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01c7714a7b
Use the ZDMA channel 0 to initialize the DRAM banks. This avoid spurious ECC errors that can occur when accessing unitialized memory. The feature is enabled by setting the option CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT and providing the following data: SPL_ZYNQMP_DRAM_BANK1_BASE: start of memory to initialize SPL_ZYNQMP_DRAM_BANK1_LEN : len of memory to initialize (hex) SPL_ZYNQMP_DRAM_BANK2_BASE: start of memory to initialize SPL_ZYNQMP_DRAM_BANK2_LEN : len of memory to initialize (hex) Setting SPL_ZYNQMP_DRAM_BANK_LEN to 0 takes no action. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
14 lines
236 B
C
14 lines
236 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright(c) 2015 - 2020 Xilinx, Inc.
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*
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* Jorge Ramirez-Ortiz <jorge@foundries.io>
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*/
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#ifndef __ARCH_ZYNQMP_ECC_INIT_H
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#define __ARCH_ZYNQMP_ECC_INIT_H
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void zynqmp_ecc_init(void);
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#endif
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