mirror of
				https://github.com/smaeul/u-boot.git
				synced 2025-11-04 14:00:19 +00:00 
			
		
		
		
	Add NAND to CP master device tree. Add armada-7040-db-nand device tree for the board configured with NAND boot device. Add comment about boot device ID to armada-7040-db DTS. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
		
			
				
	
	
		
			224 lines
		
	
	
		
			4.9 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			224 lines
		
	
	
		
			4.9 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
/*
 | 
						|
 * Copyright (C) 2017 Marvell Technology Group Ltd.
 | 
						|
 *
 | 
						|
 * This file is dual-licensed: you can use it either under the terms
 | 
						|
 * of the GPLv2 or the X11 license, at your option. Note that this dual
 | 
						|
 * licensing only applies to this file, and not this project as a
 | 
						|
 * whole.
 | 
						|
 *
 | 
						|
 *  a) This library is free software; you can redistribute it and/or
 | 
						|
 *     modify it under the terms of the GNU General Public License as
 | 
						|
 *     published by the Free Software Foundation; either version 2 of the
 | 
						|
 *     License, or (at your option) any later version.
 | 
						|
 *
 | 
						|
 *     This library is distributed in the hope that it will be useful,
 | 
						|
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 | 
						|
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 | 
						|
 *     GNU General Public License for more details.
 | 
						|
 *
 | 
						|
 * Or, alternatively,
 | 
						|
 *
 | 
						|
 *  b) Permission is hereby granted, free of charge, to any person
 | 
						|
 *     obtaining a copy of this software and associated documentation
 | 
						|
 *     files (the "Software"), to deal in the Software without
 | 
						|
 *     restriction, including without limitation the rights to use,
 | 
						|
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 | 
						|
 *     sell copies of the Software, and to permit persons to whom the
 | 
						|
 *     Software is furnished to do so, subject to the following
 | 
						|
 *     conditions:
 | 
						|
 *
 | 
						|
 *     The above copyright notice and this permission notice shall be
 | 
						|
 *     included in all copies or substantial portions of the Software.
 | 
						|
 *
 | 
						|
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 | 
						|
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 | 
						|
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 | 
						|
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 | 
						|
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 | 
						|
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 | 
						|
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 | 
						|
 *     OTHER DEALINGS IN THE SOFTWARE.
 | 
						|
 */
 | 
						|
 | 
						|
/*
 | 
						|
 * Device Tree file for Marvell Armada 7040 Development board platform
 | 
						|
 * Boot device: NAND, 0xE (SW3)
 | 
						|
 */
 | 
						|
 | 
						|
#include "armada-7040.dtsi"
 | 
						|
 | 
						|
/ {
 | 
						|
	model = "Marvell Armada 7040 DB board with NAND";
 | 
						|
	compatible = "marvell,armada7040-db-nand", "marvell,armada7040-db",
 | 
						|
		     "marvell,armada7040", "marvell,armada-ap806-quad",
 | 
						|
		     "marvell,armada-ap806";
 | 
						|
 | 
						|
	chosen {
 | 
						|
		stdout-path = "serial0:115200n8";
 | 
						|
	};
 | 
						|
 | 
						|
	aliases {
 | 
						|
		i2c0 = &cpm_i2c0;
 | 
						|
		spi0 = &cpm_spi1;
 | 
						|
	};
 | 
						|
 | 
						|
	memory@00000000 {
 | 
						|
		device_type = "memory";
 | 
						|
		reg = <0x0 0x0 0x0 0x80000000>;
 | 
						|
	};
 | 
						|
};
 | 
						|
 | 
						|
&ap_pinctl {
 | 
						|
	   /* MPP Bus:
 | 
						|
	    * SDIO  [0-5]
 | 
						|
	    * UART0 [11,19]
 | 
						|
	    */
 | 
						|
		  /* 0   1   2   3   4   5   6   7   8   9 */
 | 
						|
	pin-func = < 0x1 0x1 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0
 | 
						|
		     0x0 0x3 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x3 >;
 | 
						|
};
 | 
						|
 | 
						|
&uart0 {
 | 
						|
	status = "okay";
 | 
						|
};
 | 
						|
 | 
						|
 | 
						|
&cpm_pcie2 {
 | 
						|
	status = "okay";
 | 
						|
};
 | 
						|
 | 
						|
&cpm_i2c0 {
 | 
						|
	pinctrl-names = "default";
 | 
						|
	pinctrl-0 = <&cpm_i2c0_pins>;
 | 
						|
	status = "okay";
 | 
						|
	clock-frequency = <100000>;
 | 
						|
};
 | 
						|
 | 
						|
&cpm_pinctl {
 | 
						|
		/* MPP Bus:
 | 
						|
		 * AUDIO   [0-5]
 | 
						|
                 * GBE     [6-11]
 | 
						|
		 * SS_PWDN [12]
 | 
						|
		 * NF_RBn  [13]
 | 
						|
                 * GPIO    [14]
 | 
						|
		 * DEV_BUS [15-27]
 | 
						|
		 * SATA1   [28]
 | 
						|
		 * UART0   [29-30]
 | 
						|
		 * MSS_VTT_EN [31]
 | 
						|
		 * SMI	   [32,34]
 | 
						|
		 * XSMI    [35-36]
 | 
						|
		 * I2C	   [37-38]
 | 
						|
		 * RGMII1  [44-55]
 | 
						|
		 * SD	   [56-61]
 | 
						|
		 * GPIO    [62]
 | 
						|
		 */
 | 
						|
		 /*   0   1   2   3   4   5   6   7   8   9 */
 | 
						|
	 pin-func = < 0x2 0x2 0x2 0x2 0x2 0x2 0x3 0x3 0x3 0x3
 | 
						|
		      0x3 0x3 0x0 0x2 0x0 0x1 0x1 0x1 0x1 0x1
 | 
						|
		      0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x9 0xa
 | 
						|
		      0xa 0x0 0x7 0x0 0x7 0x7 0x7 0x2 0x2 0x0
 | 
						|
		      0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x1
 | 
						|
		      0x1 0x1 0x1 0x1 0x1 0x1 0xe 0xe 0xe 0xe
 | 
						|
		      0xe 0xe 0x0>;
 | 
						|
};
 | 
						|
 | 
						|
&cpm_spi1 {
 | 
						|
	pinctrl-names = "default";
 | 
						|
	pinctrl-0 = <&cpm_spi0_pins>;
 | 
						|
	status = "disabled";
 | 
						|
 | 
						|
	spi-flash@0 {
 | 
						|
		#address-cells = <0x1>;
 | 
						|
		#size-cells = <0x1>;
 | 
						|
		compatible = "jedec,spi-nor";
 | 
						|
		reg = <0x0>;
 | 
						|
		spi-max-frequency = <20000000>;
 | 
						|
 | 
						|
		partitions {
 | 
						|
			compatible = "fixed-partitions";
 | 
						|
			#address-cells = <1>;
 | 
						|
			#size-cells = <1>;
 | 
						|
 | 
						|
			partition@0 {
 | 
						|
				label = "U-Boot";
 | 
						|
				reg = <0x0 0x200000>;
 | 
						|
			};
 | 
						|
 | 
						|
			partition@400000 {
 | 
						|
				label = "Filesystem";
 | 
						|
				reg = <0x200000 0xe00000>;
 | 
						|
			};
 | 
						|
		};
 | 
						|
	};
 | 
						|
};
 | 
						|
 | 
						|
&cpm_sata0 {
 | 
						|
	status = "okay";
 | 
						|
};
 | 
						|
 | 
						|
&cpm_usb3_0 {
 | 
						|
	status = "okay";
 | 
						|
};
 | 
						|
 | 
						|
&cpm_usb3_1 {
 | 
						|
	status = "okay";
 | 
						|
};
 | 
						|
 | 
						|
&cpm_comphy {
 | 
						|
	phy0 {
 | 
						|
		phy-type = <PHY_TYPE_SGMII2>;
 | 
						|
		phy-speed = <PHY_SPEED_3_125G>;
 | 
						|
	};
 | 
						|
 | 
						|
	phy1 {
 | 
						|
		phy-type = <PHY_TYPE_USB3_HOST0>;
 | 
						|
		phy-speed = <PHY_SPEED_5G>;
 | 
						|
	};
 | 
						|
 | 
						|
	phy2 {
 | 
						|
		phy-type = <PHY_TYPE_SGMII0>;
 | 
						|
		phy-speed = <PHY_SPEED_1_25G>;
 | 
						|
	};
 | 
						|
 | 
						|
	phy3 {
 | 
						|
		phy-type = <PHY_TYPE_SATA1>;
 | 
						|
		phy-speed = <PHY_SPEED_5G>;
 | 
						|
	};
 | 
						|
 | 
						|
	phy4 {
 | 
						|
		phy-type = <PHY_TYPE_USB3_HOST1>;
 | 
						|
		phy-speed = <PHY_SPEED_5G>;
 | 
						|
	};
 | 
						|
 | 
						|
	phy5 {
 | 
						|
		phy-type = <PHY_TYPE_PEX2>;
 | 
						|
		phy-speed = <PHY_SPEED_5G>;
 | 
						|
	};
 | 
						|
};
 | 
						|
 | 
						|
&cpm_nand {
 | 
						|
	status = "okay";
 | 
						|
};
 | 
						|
 | 
						|
&cpm_utmi0 {
 | 
						|
	status = "okay";
 | 
						|
};
 | 
						|
 | 
						|
&cpm_utmi1 {
 | 
						|
	status = "okay";
 | 
						|
};
 | 
						|
 | 
						|
&ap_sdhci0 {
 | 
						|
	status = "okay";
 | 
						|
	bus-width = <4>;
 | 
						|
	no-1-8-v;
 | 
						|
	non-removable;
 | 
						|
};
 | 
						|
 | 
						|
&cpm_sdhci0 {
 | 
						|
	status = "okay";
 | 
						|
	bus-width = <4>;
 | 
						|
	no-1-8-v;
 | 
						|
	non-removable;
 | 
						|
};
 |