Dinh Nguyen c624d07f3f arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines ...

The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
not the mpumodrst. So the bank for these reset bits should be 1, not 0.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

2015-11-03 17:32:16 +01:00

..

clock_manager.h

arm: socfpga: clock: Clean up pll_config.h

2015-08-08 14:14:06 +02:00

dwmmc.h

mmc: dw_mmc: Probe the MMC from OF

2015-09-04 11:54:20 +02:00

fpga_manager.h

ARM: socfpga: move SoC headers to mach-socfpga/include/mach

2015-05-07 05:21:15 +02:00

freeze_controller.h

ARM: socfpga: move SoC headers to mach-socfpga/include/mach

2015-05-07 05:21:15 +02:00

gpio.h

ARM: socfpga: move SoC headers to mach-socfpga/include/mach

2015-05-07 05:21:15 +02:00

nic301.h

ARM: socfpga: move SoC headers to mach-socfpga/include/mach

2015-05-07 05:21:15 +02:00

reset_manager.h

arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines

2015-11-03 17:32:16 +01:00

scan_manager.h

arm: socfpga: scan: Add code to get FPGA ID

2015-08-08 14:14:30 +02:00

scu.h

ARM: socfpga: move SoC headers to mach-socfpga/include/mach

2015-05-07 05:21:15 +02:00

sdram.h

ddr: altera: sequencer: Wrap misc remaining macros

2015-08-08 14:14:29 +02:00

socfpga_base_addrs.h

ARM: socfpga: move SoC headers to mach-socfpga/include/mach

2015-05-07 05:21:15 +02:00

system_manager.h

arm: socfpga: Make the pinmux table const u8

2015-08-23 11:56:20 +02:00

timer.h

ARM: socfpga: move SoC headers to mach-socfpga/include/mach

2015-05-07 05:21:15 +02:00