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	The rsk7264 (also know as rsk2+sh7264) is an SH2A based board with 64MB NAND flash and 64MB SDRAM. It is very similar to the rsk7203 board. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
		
			
				
	
	
		
			42 lines
		
	
	
		
			784 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			42 lines
		
	
	
		
			784 B
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef _ASM_CPU_SH7264_H_
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| #define _ASM_CPU_SH7264_H_
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| 
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| /* Cache */
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| #define CCR1		0xFFFC1000
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| #define CCR		CCR1
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| 
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| /* PFC */
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| #define PACR		0xA4050100
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| #define PBCR		0xA4050102
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| #define PCCR		0xA4050104
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| #define PETCR		0xA4050106
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| 
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| /* Port Data Registers */
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| #define PADR		0xA4050120
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| #define PBDR		0xA4050122
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| #define PCDR		0xA4050124
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| 
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| /* BSC */
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| 
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| /* SDRAM controller */
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| 
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| /* SCIF */
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| #define SCSMR_3		0xFFFE9800
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| #define SCIF3_BASE	SCSMR_3
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| 
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| /* Timer(CMT) */
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| #define CMSTR		0xFFFEC000
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| #define CMCSR_0 	0xFFFEC002
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| #define CMCNT_0 	0xFFFEC004
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| #define CMCOR_0 	0xFFFEC006
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| #define CMCSR_1 	0xFFFEC008
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| #define CMCNT_1 	0xFFFEC00A
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| #define CMCOR_1		0xFFFEC00C
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| 
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| /* On chip oscillator circuits */
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| #define FRQCR		0xA415FF80
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| #define WTCNT		0xA415FF84
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| #define WTCSR		0xA415FF86
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| 
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| #endif	/* _ASM_CPU_SH7264_H_ */
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