mirror of
https://github.com/smaeul/u-boot.git
synced 2025-10-31 12:08:19 +00:00
6ddc4fd822
Add the required node describing how to find the EC on link. Signed-off-by: Simon Glass <sjg@chromium.org>
54 lines
932 B
Plaintext
54 lines
932 B
Plaintext
/dts-v1/;
|
|
|
|
/include/ "coreboot.dtsi"
|
|
|
|
/ {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
model = "Google Link";
|
|
compatible = "google,link", "intel,celeron-ivybridge";
|
|
|
|
config {
|
|
silent_console = <0>;
|
|
};
|
|
|
|
gpio: gpio {};
|
|
|
|
serial {
|
|
reg = <0x3f8 8>;
|
|
clock-frequency = <115200>;
|
|
};
|
|
|
|
chosen { };
|
|
memory { device_type = "memory"; reg = <0 0>; };
|
|
|
|
spi {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "intel,ich9";
|
|
spi-flash@0 {
|
|
reg = <0>;
|
|
compatible = "winbond,w25q64", "spi-flash";
|
|
memory-map = <0xff800000 0x00800000>;
|
|
};
|
|
};
|
|
|
|
lpc {
|
|
compatible = "intel,lpc";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
cros-ec@200 {
|
|
compatible = "google,cros-ec";
|
|
reg = <0x204 1 0x200 1 0x880 0x80>;
|
|
|
|
/* This describes the flash memory within the EC */
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
flash@8000000 {
|
|
reg = <0x08000000 0x20000>;
|
|
erase-value = <0xff>;
|
|
};
|
|
};
|
|
};
|
|
};
|