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	Add low level platform initialization for the AST2600 SoC. The 2-stage booting with U-Boot SPL are leveraged to support different booting mode. However, currently the patch supports only the booting from memory-mapped SPI flash. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
		
			
				
	
	
		
			24 lines
		
	
	
		
			543 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			24 lines
		
	
	
		
			543 B
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0+ */
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| /*
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|  * Copyright (c) Aspeed Technology Inc.
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|  */
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| 
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| #ifndef _ASM_ARCH_BOOT0_H
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| #define _ASM_ARCH_BOOT0_H
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| 
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| _start:
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| 	ARM_VECTORS
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| 
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| 	.word	0x0	/* key location */
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| 	.word	0x0	/* start address of image */
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| 	.word	0xfc00  /* maximum image size: 63KB */
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| 	.word	0x0	/* signature address */
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| 	.word	0x0	/* header revision ID low */
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| 	.word	0x0	/* header revision ID high */
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| 	.word	0x0	/* reserved */
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| 	.word	0x0	/* checksum */
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| 	.word	0x0	/* BL2 secure header */
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| 	.word	0x0	/* public key or digest offset for BL2 */
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| 
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| #endif
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