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fbb9ecf749
Some SOCs have discontiguously-numbered cores, and so we can't determine the valid core numbers via the FRR register any more. We define CPU_TYPE_ENTRY_MASK to specify a discontiguous core mask, and helper functions to process the mask and enumerate over the set of valid cores. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
90 lines
2.6 KiB
C
90 lines
2.6 KiB
C
/*
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* Copyright 2008-2009 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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int
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cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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unsigned long cpuid;
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if (argc < 3)
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return cmd_usage(cmdtp);
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cpuid = simple_strtoul(argv[1], NULL, 10);
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if (!is_core_valid(cpuid)) {
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printf ("Core num: %lu is not valid\n", cpuid);
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return 1;
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}
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if (argc == 3) {
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if (strncmp(argv[2], "reset", 5) == 0)
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cpu_reset(cpuid);
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else if (strncmp(argv[2], "status", 6) == 0)
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cpu_status(cpuid);
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else if (strncmp(argv[2], "disable", 7) == 0)
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return cpu_disable(cpuid);
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else
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return cmd_usage(cmdtp);
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return 0;
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}
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/* 4 or greater, make sure its release */
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if (strncmp(argv[2], "release", 7) != 0)
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return cmd_usage(cmdtp);
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if (cpu_release(cpuid, argc - 3, argv + 3))
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return cmd_usage(cmdtp);
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return 0;
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}
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#ifdef CONFIG_PPC
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#define CPU_ARCH_HELP \
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" [args] : <pir> <r3> <r6>\n" \
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" pir - processor id (if writeable)\n" \
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" r3 - value for gpr 3\n" \
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" r6 - value for gpr 6\n" \
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"\n" \
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" Use '-' for any arg if you want the default value.\n" \
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" Default for r3 is <num> and r6 is 0\n" \
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"\n" \
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" When cpu <num> is released r4 and r5 = 0.\n" \
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" r7 will contain the size of the initial mapped area"
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#endif
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U_BOOT_CMD(
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cpu, CONFIG_SYS_MAXARGS, 1, cpu_cmd,
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"Multiprocessor CPU boot manipulation and release",
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"<num> reset - Reset cpu <num>\n"
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"cpu <num> status - Status of cpu <num>\n"
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"cpu <num> disable - Disable cpu <num>\n"
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"cpu <num> release <addr> [args] - Release cpu <num> at <addr> with [args]"
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#ifdef CPU_ARCH_HELP
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"\n"
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CPU_ARCH_HELP
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#endif
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);
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