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cdb23792e8
Remove platform CONFIG_SYS_HZ definition for configs A-Z*. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
151 lines
6.3 KiB
C
151 lines
6.3 KiB
C
/*
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* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*------------------------------------------------------------------------
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* BOARD/CPU
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*----------------------------------------------------------------------*/
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#define CONFIG_PCI5441 1 /* PCI-5441 board */
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#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
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#define CONFIG_SYS_RESET_ADDR 0x00000000 /* Hard-reset address */
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#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
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#define CONFIG_SYS_NIOS_SYSID_BASE 0x00920828 /* System id address */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
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/*------------------------------------------------------------------------
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* CACHE -- the following will support II/s and II/f. The II/s does not
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* have dcache, so the cache instructions will behave as NOPs.
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_ICACHE_SIZE 4096 /* 4 KByte total */
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#define CONFIG_SYS_ICACHELINE_SIZE 32 /* 32 bytes/line */
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#define CONFIG_SYS_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
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#define CONFIG_SYS_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
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/*------------------------------------------------------------------------
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* MEMORY BASE ADDRESSES
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_FLASH_BASE 0x00000000 /* FLASH base addr */
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#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
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#define CONFIG_SYS_SDRAM_BASE 0x01000000 /* SDRAM base addr */
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#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MByte */
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/*------------------------------------------------------------------------
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* MEMORY ORGANIZATION
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* -Monitor at top.
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* -The heap is placed below the monitor.
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* -Global data is placed below the heap.
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* -The stack is placed below global data (&grows down).
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* Reserve 128k */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
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/*------------------------------------------------------------------------
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* FLASH (AM29LV065D)
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
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#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */
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/*------------------------------------------------------------------------
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* ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
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* CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the
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* reset address, no? This will keep the environment in user region
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* of flash. NOTE: the monitor length must be multiple of sector size
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* (which is common practice).
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*----------------------------------------------------------------------*/
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#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */
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#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
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#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_RESET_ADDR + CONFIG_SYS_MONITOR_LEN)
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/*------------------------------------------------------------------------
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* CONSOLE
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*----------------------------------------------------------------------*/
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#define CONFIG_ALTERA_UART 1 /* Use altera uart */
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#if defined(CONFIG_ALTERA_JTAG_UART)
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#define CONFIG_SYS_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */
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#else
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#define CONFIG_SYS_NIOS_CONSOLE 0x009208a0 /* UART base addr */
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#endif
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#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
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#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
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#define CONFIG_SYS_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
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#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
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/*------------------------------------------------------------------------
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* DEBUG
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*----------------------------------------------------------------------*/
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#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
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/*------------------------------------------------------------------------
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* TIMEBASE --
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*
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* The high res timer defaults to 1 msec. Since it includes the period
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* registers, the interrupt frequency can be reduced using TMRCNT.
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* If the default period is acceptable, TMRCNT can be left undefined.
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* TMRMS represents the desired mecs per tick (msecs per interrupt).
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_LOW_RES_TIMER
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#define CONFIG_SYS_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */
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#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */
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#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/
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#define CONFIG_SYS_NIOS_TMRCNT \
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(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMD_BDI
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#define CONFIG_CMD_ECHO
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_IMI
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_LOADS
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#define CONFIG_CMD_LOADB
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_MISC
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#define CONFIG_CMD_RUN
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#define CONFIG_CMD_SAVES
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/*------------------------------------------------------------------------
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* MISC
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_LONGHELP /* Provide extended help*/
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
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#define CONFIG_SYS_MAXARGS 16 /* Max command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg buf size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buf size */
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* Default load address */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* Start addr for test */
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#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_INIT_SP - 0x00020000
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#endif /* __CONFIG_H */
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