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d1cd045982
On x86 it is common to use 'post codes' which are 8-bit hex values emitted from the code and visible to the user. Traditionally two 7-segment displays were made available on the motherboard to show the last post code that was emitted. This allows diagnosis of a boot problem since it is possible to see where the code got to before it died. On modern hardware these codes are not normally visible. On Chromebooks they are displayed by the Embedded Controller (EC), so it is useful to emit them. We must enable this feature for the EC to see the codes, so add an option for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
30 lines
529 B
ArmAsm
30 lines
529 B
ArmAsm
/*
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* Copyright (c) 2014 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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.globl early_board_init
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early_board_init:
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/* Enable post codes to EC */
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#ifdef CONFIG_EARLY_POST_CROS_EC
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mov $0x1b, %ecx
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rdmsr
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and $0x100, %eax
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test %eax, %eax
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je 1f
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mov $0x8000f8f0, %eax
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mov $0xcf8, %dx
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out %eax, (%dx)
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mov $0xfed1c001, %eax
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mov $0xcfc, %dx
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out %eax, (%dx)
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mov $0xfed1f410, %esp
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mov (%esp), %eax
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and $0xfffffffb, %eax
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mov %eax, (%esp)
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1:
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#endif
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jmp early_board_init_ret
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