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			127 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			127 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * (C) Copyright 2003
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|  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| #include <common.h>
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| #include <command.h>
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| #include <netdev.h>
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| #include <asm/addrspace.h>
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| #include <asm/inca-ip.h>
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| #include <asm/io.h>
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| #include <asm/reboot.h>
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| 
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| extern uint incaip_get_cpuclk(void);
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| 
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| void _machine_restart(void)
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| {
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| 	*INCA_IP_WDT_RST_REQ = 0x3f;
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| }
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| 
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| static ulong max_sdram_size(void)
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| {
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| 	/* The only supported SDRAM data width is 16bit.
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| 	 */
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| #define CONFIG_SYS_DW	2
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| 
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| 	/* The only supported number of SDRAM banks is 4.
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| 	 */
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| #define CONFIG_SYS_NB	4
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| 
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| 	ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0;
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| 	int   cols   = cfgpb0 & 0xF;
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| 	int   rows   = (cfgpb0 & 0xF0) >> 4;
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| 	ulong size   = (1 << (rows + cols)) * CONFIG_SYS_DW * CONFIG_SYS_NB;
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| 
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| 	return size;
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| }
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| 
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| phys_size_t initdram(int board_type)
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| {
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| 	int   rows, cols, best_val = *INCA_IP_SDRAM_MC_CFGPB0;
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| 	ulong size, max_size       = 0;
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| 	ulong our_address;
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| 
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| 	asm volatile ("move %0, $25" : "=r" (our_address) :);
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| 
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| 		/* Can't probe for RAM size unless we are running from Flash.
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| 		 */
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| 	if (CPHYSADDR(our_address) < CPHYSADDR(PHYS_FLASH_1))
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| 	{
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| 		return max_sdram_size();
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| 	}
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| 
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| 	for (cols = 0x8; cols <= 0xC; cols++)
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| 	{
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| 		for (rows = 0xB; rows <= 0xD; rows++)
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| 		{
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| 			*INCA_IP_SDRAM_MC_CFGPB0 = (0x14 << 8) |
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| 			                           (rows << 4) | cols;
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| 			size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
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| 			                                     max_sdram_size());
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| 
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| 			if (size > max_size)
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| 			{
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| 				best_val = *INCA_IP_SDRAM_MC_CFGPB0;
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| 				max_size = size;
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| 			}
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| 		}
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| 	}
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| 
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| 	*INCA_IP_SDRAM_MC_CFGPB0 = best_val;
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| 	return max_size;
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| }
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| 
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| int checkboard (void)
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| {
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| 	unsigned long chipid = *INCA_IP_WDT_CHIPID;
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| 	int part_num;
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| 
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| 	puts ("Board: INCA-IP ");
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| 	part_num = (chipid >> 12) & 0xffff;
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| 	switch (part_num) {
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| 	case 0xc0:
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| 		printf ("Standard Version, ");
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| 		break;
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| 	case 0xc1:
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| 		printf ("Basic Version, ");
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| 		break;
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| 	default:
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| 		printf ("Unknown Part Number 0x%x ", part_num);
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| 		break;
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| 	}
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| 
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| 	printf ("Chip V1.%ld, ", (chipid >> 28));
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| 
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| 	printf("CPU Speed %d MHz\n", incaip_get_cpuclk()/1000000);
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| 
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| 	set_io_port_base(0);
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| 
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| 	return 0;
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| }
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| 
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| #if defined(CONFIG_INCA_IP_SWITCH)
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| int board_eth_init(bd_t *bis)
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| {
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| 	return inca_switch_initialize(bis);
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| }
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| #endif
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