mirror of
				https://github.com/smaeul/u-boot.git
				synced 2025-10-30 19:48:19 +00:00 
			
		
		
		
	Import updated device trees from Linux tag v5.9. This picks up new hardware (PinePhone, PineTab); and it drops the U-Boot specific DTSI files for the Pinebook and the Teres-I, since the ANX6345 bridge is now supported upstream. A couple of headers needed updates for recently-added hardware support. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
		
			
				
	
	
		
			76 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			76 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| /*
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|  * Copyright (C) 2020 Vasily khoruzhick <anarsoul@gmail.com>
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|  */
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| 
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| / {
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| 	cpu0_opp_table: opp_table0 {
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| 		compatible = "operating-points-v2";
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| 		opp-shared;
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| 
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| 		opp-648000000 {
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| 			opp-hz = /bits/ 64 <648000000>;
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| 			opp-microvolt = <1040000>;
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| 			clock-latency-ns = <244144>; /* 8 32k periods */
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| 		};
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| 
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| 		opp-816000000 {
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| 			opp-hz = /bits/ 64 <816000000>;
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| 			opp-microvolt = <1100000>;
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| 			clock-latency-ns = <244144>; /* 8 32k periods */
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| 		};
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| 
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| 		opp-912000000 {
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| 			opp-hz = /bits/ 64 <912000000>;
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| 			opp-microvolt = <1120000>;
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| 			clock-latency-ns = <244144>; /* 8 32k periods */
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| 		};
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| 
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| 		opp-960000000 {
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| 			opp-hz = /bits/ 64 <960000000>;
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| 			opp-microvolt = <1160000>;
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| 			clock-latency-ns = <244144>; /* 8 32k periods */
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| 		};
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| 
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| 		opp-1008000000 {
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| 			opp-hz = /bits/ 64 <1008000000>;
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| 			opp-microvolt = <1200000>;
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| 			clock-latency-ns = <244144>; /* 8 32k periods */
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| 		};
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| 
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| 		opp-1056000000 {
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| 			opp-hz = /bits/ 64 <1056000000>;
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| 			opp-microvolt = <1240000>;
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| 			clock-latency-ns = <244144>; /* 8 32k periods */
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| 		};
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| 
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| 		opp-1104000000 {
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| 			opp-hz = /bits/ 64 <1104000000>;
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| 			opp-microvolt = <1260000>;
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| 			clock-latency-ns = <244144>; /* 8 32k periods */
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| 		};
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| 
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| 		opp-1152000000 {
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| 			opp-hz = /bits/ 64 <1152000000>;
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| 			opp-microvolt = <1300000>;
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| 			clock-latency-ns = <244144>; /* 8 32k periods */
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| 		};
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| 	};
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| };
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| 
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| &cpu0 {
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| 	operating-points-v2 = <&cpu0_opp_table>;
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| };
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| 
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| &cpu1 {
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| 	operating-points-v2 = <&cpu0_opp_table>;
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| };
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| 
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| &cpu2 {
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| 	operating-points-v2 = <&cpu0_opp_table>;
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| };
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| 
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| &cpu3 {
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| 	operating-points-v2 = <&cpu0_opp_table>;
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| };
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