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	- Add mem-guardian.h derived from am33xx/mem.h
    * Add GPMC config values optimized for Bosch Guardian Board
    * NAND Chip used by Bosch Guardian Board is Micron MT29F4G08ABBFA
Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-3-Gireesh.Hiremath@in.bosch.com
		
	
			
		
			
				
	
	
		
			64 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			64 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0+ */
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| /*
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|  * (C) Copyright 2006-2008
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|  * Texas Instruments, <www.ti.com>
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|  *
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|  * (C) Copyright 2020
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|  * Robert Bosch Power Tools GmbH
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|  *
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|  * Author
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|  *		Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
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|  *
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|  * Copied from:
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|  *		arch/arm/include/asm/arch-am33xx/mem.h
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|  *
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|  * Initial Code from:
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|  *		Mansoor Ahamed <mansoor.ahamed@ti.com>
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|  *		Richard Woodruff <r-woodruff2@ti.com>
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|  */
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| 
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| #ifndef _MEM_GUARDIAN_H_
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| #define _MEM_GUARDIAN_H_
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| 
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| /*
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|  * GPMC settings -
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|  * Definitions is as per the following format
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|  * #define <PART>_GPMC_CONFIG<x> <value>
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|  * Where:
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|  * PART is the part name e.g. M_NAND - Micron Nand Flash
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|  * x is GPMC config registers from 1 to 7 (there will be 7 macros)
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|  * Value is corresponding value
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|  *
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|  * For every valid PRCM configuration there should be only one definition of
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|  * the same.
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|  *
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|  * The following values are optimized for improving the NAND Read speed
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|  * They are applicable and tested for Bosch Guardian Board.
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|  * Read Speeds rose from 1.5MiBs to over 7.6MiBs
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|  *
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|  * Currently valid part Names are (PART):
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|  * M_NAND - Micron NAND
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|  */
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| #define GPMC_SIZE_256M		0x0
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| #define GPMC_SIZE_128M		0x8
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| #define GPMC_SIZE_64M		0xC
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| #define GPMC_SIZE_32M		0xE
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| #define GPMC_SIZE_16M		0xF
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| 
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| #define M_NAND_GPMC_CONFIG1	0x00000800
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| #define M_NAND_GPMC_CONFIG2	0x00030300
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| #define M_NAND_GPMC_CONFIG3	0x00030300
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| #define M_NAND_GPMC_CONFIG4	0x02000201
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| #define M_NAND_GPMC_CONFIG5	0x00030303
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| #define M_NAND_GPMC_CONFIG6	0x000000C0
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| #define M_NAND_GPMC_CONFIG7	0x00000008
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| 
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| /* max number of GPMC Chip Selects */
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| #define GPMC_MAX_CS		8
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| /* max number of GPMC regs */
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| #define GPMC_MAX_REG		7
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| 
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| #define DBG_MPDB		6
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| 
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| #endif /* endif _MEM_GUARDIAN_H_ */
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