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	Move the CONFIG_AT91FAMILY option from include/mach/<soc>.h header file to Kconfig. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
		
			
				
	
	
		
			129 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			129 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9rl.h]
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|  *
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|  *  Copyright (C) 2007 Atmel Corporation
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|  *
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|  * Common definitions.
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|  * Based on AT91SAM9RL datasheet revision A. (Preliminary)
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|  *
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file COPYING in the main directory of this archive for
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|  * more details.
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|  */
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| 
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| #ifndef AT91SAM9RL_H
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| #define AT91SAM9RL_H
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| 
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| /*
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|  * Peripheral identifiers/interrupts.
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|  */
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| #define ATMEL_ID_FIQ	0	/* Advanced Interrupt Controller (FIQ) */
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| #define ATMEL_ID_SYS	1	/* System Peripherals */
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| #define ATMEL_ID_PIOA	2	/* Parallel IO Controller A */
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| #define ATMEL_ID_PIOB	3	/* Parallel IO Controller B */
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| #define ATMEL_ID_PIOC	4	/* Parallel IO Controller C */
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| #define ATMEL_ID_PIOD	5	/* Parallel IO Controller D */
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| #define ATMEL_ID_USART0	6	/* USART 0 */
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| #define ATMEL_ID_USART1	7	/* USART 1 */
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| #define ATMEL_ID_USART2	8	/* USART 2 */
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| #define ATMEL_ID_USART3	9	/* USART 3 */
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| #define ATMEL_ID_MCI	10	/* Multimedia Card Interface */
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| #define ATMEL_ID_TWI0	11	/* TWI 0 */
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| #define ATMEL_ID_TWI1	12	/* TWI 1 */
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| #define ATMEL_ID_SPI	13	/* Serial Peripheral Interface */
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| #define ATMEL_ID_SSC0	14	/* Serial Synchronous Controller 0 */
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| #define ATMEL_ID_SSC1	15	/* Serial Synchronous Controller 1 */
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| #define ATMEL_ID_TC0	16	/* Timer Counter 0 */
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| #define ATMEL_ID_TC1	17	/* Timer Counter 1 */
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| #define ATMEL_ID_TC2	18	/* Timer Counter 2 */
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| #define ATMEL_ID_PWMC	19	/* Pulse Width Modulation Controller */
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| #define ATMEL_ID_TSC	20	/* Touch Screen Controller */
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| #define ATMEL_ID_DMA	21	/* DMA Controller */
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| #define ATMEL_ID_UDPHS	22	/* USB Device HS */
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| #define ATMEL_ID_LCDC	23	/* LCD Controller */
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| #define ATMEL_ID_AC97C	24	/* AC97 Controller */
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| #define ATMEL_ID_IRQ0	31	/* Advanced Interrupt Controller (IRQ0) */
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| 
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| /*
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|  * User Peripheral physical base addresses.
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|  */
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| #define ATMEL_BASE_TCB0		0xfffa0000
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| #define ATMEL_BASE_TC0		0xfffa0000
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| #define ATMEL_BASE_TC1		0xfffa0040
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| #define ATMEL_BASE_TC2		0xfffa0080
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| #define ATMEL_BASE_MCI		0xfffa4000
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| #define ATMEL_BASE_TWI0		0xfffa8000
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| #define ATMEL_BASE_TWI1		0xfffac000
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| #define ATMEL_BASE_USART0	0xfffb0000
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| #define ATMEL_BASE_USART1	0xfffb4000
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| #define ATMEL_BASE_USART2	0xfffb8000
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| #define ATMEL_BASE_USART3	0xfffbc000
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| #define ATMEL_BASE_SSC0		0xfffc0000
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| #define ATMEL_BASE_SSC1		0xfffc4000
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| #define ATMEL_BASE_PWMC		0xfffc8000
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| #define ATMEL_BASE_SPI0		0xfffcc000
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| #define ATMEL_BASE_TSC		0xfffd0000
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| #define ATMEL_BASE_UDPHS	0xfffd4000
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| #define ATMEL_BASE_AC97C	0xfffd8000
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| #define ATMEL_BASE_SYS		0xffffc000
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| 
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| /*
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|  * System Peripherals
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|  */
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| #define ATMEL_BASE_DMA		0xffffe600
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| #define ATMEL_BASE_ECC		0xffffe800
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| #define ATMEL_BASE_SDRAMC	0xffffea00
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| #define ATMEL_BASE_SMC		0xffffec00
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| #define ATMEL_BASE_MATRIX	0xffffee00
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| #define ATMEL_BASE_CCFG		0xffffef10
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| #define ATMEL_BASE_AIC		0xfffff000
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| #define ATMEL_BASE_DBGU		0xfffff200
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| #define ATMEL_BASE_PIOA		0xfffff400
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| #define ATMEL_BASE_PIOB		0xfffff600
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| #define ATMEL_BASE_PIOC		0xfffff800
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| #define ATMEL_BASE_PIOD		0xfffffa00
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| #define ATMEL_BASE_PMC		0xfffffc00
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| #define ATMEL_BASE_RSTC		0xfffffd00
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| #define ATMEL_BASE_SHDWC	0xfffffd10
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| #define ATMEL_BASE_RTT		0xfffffd20
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| #define ATMEL_BASE_PIT		0xfffffd30
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| #define ATMEL_BASE_WDT		0xfffffd40
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| #define ATMEL_BASE_SCKCR	0xfffffd50
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| #define ATMEL_BASE_GPBR		0xfffffd60
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| #define ATMEL_BASE_RTC		0xfffffe00
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| 
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| /*
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|  * Internal Memory.
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|  */
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| #define ATMEL_BASE_SRAM		0x00300000	/* Internal SRAM base address */
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| #define ATMEL_BASE_ROM		0x00400000	/* Internal ROM base address */
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| 
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| #define ATMEL_BASE_LCDC		0x00500000	/* LCD Controller */
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| #define ATMEL_UHP_BASE		0x00600000	/* USB Device HS controller */
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| 
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| /*
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|  * External memory
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|  */
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| #define ATMEL_BASE_CS0		0x10000000
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| #define ATMEL_BASE_CS1		0x20000000	/* SDRAM */
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| #define ATMEL_BASE_CS2		0x30000000
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| #define ATMEL_BASE_CS3		0x40000000	/* NAND */
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| #define ATMEL_BASE_CS4		0x50000000	/* Compact Flash Slot 0 */
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| #define ATMEL_BASE_CS5		0x60000000	/* Compact Flash Slot 1 */
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| 
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| /* Timer */
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| #define CONFIG_SYS_TIMER_COUNTER	0xfffffd3c
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| 
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| /*
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|  * Other misc defines
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|  */
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| #define ATMEL_PIO_PORTS		4		/* this SoC has 4 PIO */
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| #define ATMEL_BASE_PIO		ATMEL_BASE_PIOA
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| 
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| /*
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|  * Cpu Name
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|  */
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| #define ATMEL_CPU_NAME		"AT91SAM9RL"
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| 
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| #endif
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