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	Add MXC_CPU_MX6UL for i.MX6UL CPU type which is got at runtime from DIGPROG register. But the value has been occupied by MXC_CPU_MX6D which is not real id from DIGPROG register, so change i.MX6D to value 0x67 which was not occupied. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
		
			
				
	
	
		
			25 lines
		
	
	
		
			584 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			25 lines
		
	
	
		
			584 B
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * (C) Copyright 2014 Freescale Semiconductor, Inc.
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #define MXC_CPU_MX51		0x51
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| #define MXC_CPU_MX53		0x53
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| #define MXC_CPU_MX6SL		0x60
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| #define MXC_CPU_MX6DL		0x61
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| #define MXC_CPU_MX6SX		0x62
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| #define MXC_CPU_MX6Q		0x63
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| #define MXC_CPU_MX6UL		0x64
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| #define MXC_CPU_MX6SOLO		0x65 /* dummy ID */
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| #define MXC_CPU_MX6D		0x67
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| #define MXC_CPU_MX6DP		0x68
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| #define MXC_CPU_MX6QP		0x69
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| 
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| #define CS0_128					0
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| #define CS0_64M_CS1_64M				1
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| #define CS0_64M_CS1_32M_CS2_32M			2
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| #define CS0_32M_CS1_32M_CS2_32M_CS3_32M		3
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| 
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| u32 get_imx_reset_cause(void);
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