mirror of
https://github.com/smaeul/u-boot.git
synced 2025-11-03 21:48:15 +00:00
c79cbb5952
If for some reason, TSC timer frequency cannot be determined from hardware, nor is it specified in the device tree, U-Boot will panic resulting in endless reset during boot. Let's define a default TSC timer frequency using the Kconfig value CONFIG_X86_TSC_TIMER_FREQ (note: #include must be used instead of /include/ otherwise the macro is not pre-processed). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
48 lines
703 B
Plaintext
48 lines
703 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
|
|
*
|
|
* Generic coreboot payload device tree for x86 targets
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
/include/ "skeleton.dtsi"
|
|
/include/ "keyboard.dtsi"
|
|
/include/ "pcspkr.dtsi"
|
|
/include/ "reset.dtsi"
|
|
/include/ "rtc.dtsi"
|
|
|
|
#include "tsc_timer.dtsi"
|
|
|
|
/ {
|
|
model = "coreboot x86 payload";
|
|
compatible = "coreboot,x86-payload";
|
|
|
|
aliases {
|
|
serial0 = &serial;
|
|
};
|
|
|
|
config {
|
|
silent_console = <0>;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "/serial";
|
|
};
|
|
|
|
pci {
|
|
compatible = "pci-x86";
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
serial: serial {
|
|
u-boot,dm-pre-reloc;
|
|
compatible = "coreboot-serial";
|
|
};
|
|
|
|
coreboot-fb {
|
|
compatible = "coreboot-fb";
|
|
};
|
|
};
|