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1050eaa082
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d") and required binding for S700 SoC that is a 64-bit Quad-core ARM Cortex-A53 cores. It also provisions dts file to be built based on selected platform(CONFIG_MACH_S900/S700). Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
119 lines
2.5 KiB
C
119 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Device Tree binding constants for Actions Semi S700 Clock Management Unit
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*
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* Copyright (c) 2014 Actions Semi Inc.
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* Author: David Liu <liuwei@actions-semi.com>
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*
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* Author: Pathiban Nallathambi <pn@denx.de>
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* Author: Saravanan Sekar <sravanhome@gmail.com>
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*/
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#ifndef __DT_BINDINGS_CLOCK_S700_H
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#define __DT_BINDINGS_CLOCK_S700_H
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#define CLK_NONE 0
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/* pll clocks */
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#define CLK_CORE_PLL 1
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#define CLK_DEV_PLL 2
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#define CLK_DDR_PLL 3
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#define CLK_NAND_PLL 4
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#define CLK_DISPLAY_PLL 5
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#define CLK_TVOUT_PLL 6
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#define CLK_CVBS_PLL 7
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#define CLK_AUDIO_PLL 8
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#define CLK_ETHERNET_PLL 9
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/* system clock */
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#define CLK_CPU 10
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#define CLK_DEV 11
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#define CLK_AHB 12
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#define CLK_APB 13
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#define CLK_DMAC 14
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#define CLK_NOC0_CLK_MUX 15
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#define CLK_NOC1_CLK_MUX 16
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#define CLK_HP_CLK_MUX 17
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#define CLK_HP_CLK_DIV 18
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#define CLK_NOC1_CLK_DIV 19
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#define CLK_NOC0 20
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#define CLK_NOC1 21
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#define CLK_SENOR_SRC 22
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/* peripheral device clock */
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#define CLK_GPIO 23
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#define CLK_TIMER 24
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#define CLK_DSI 25
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#define CLK_CSI 26
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#define CLK_SI 27
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#define CLK_DE 28
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#define CLK_HDE 29
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#define CLK_VDE 30
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#define CLK_VCE 31
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#define CLK_NAND 32
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#define CLK_SD0 33
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#define CLK_SD1 34
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#define CLK_SD2 35
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#define CLK_UART0 36
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#define CLK_UART1 37
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#define CLK_UART2 38
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#define CLK_UART3 39
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#define CLK_UART4 40
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#define CLK_UART5 41
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#define CLK_UART6 42
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#define CLK_PWM0 43
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#define CLK_PWM1 44
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#define CLK_PWM2 45
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#define CLK_PWM3 46
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#define CLK_PWM4 47
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#define CLK_PWM5 48
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#define CLK_GPU3D 49
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#define CLK_I2C0 50
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#define CLK_I2C1 51
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#define CLK_I2C2 52
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#define CLK_I2C3 53
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#define CLK_SPI0 54
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#define CLK_SPI1 55
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#define CLK_SPI2 56
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#define CLK_SPI3 57
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#define CLK_USB3_480MPLL0 58
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#define CLK_USB3_480MPHY0 59
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#define CLK_USB3_5GPHY 60
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#define CLK_USB3_CCE 61
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#define CLK_USB3_MAC 62
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#define CLK_LCD 63
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#define CLK_HDMI_AUDIO 64
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#define CLK_I2SRX 65
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#define CLK_I2STX 66
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#define CLK_SENSOR0 67
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#define CLK_SENSOR1 68
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#define CLK_HDMI_DEV 69
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#define CLK_ETHERNET 70
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#define CLK_RMII_REF 71
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#define CLK_USB2H0_PLLEN 72
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#define CLK_USB2H0_PHY 73
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#define CLK_USB2H0_CCE 74
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#define CLK_USB2H1_PLLEN 75
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#define CLK_USB2H1_PHY 76
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#define CLK_USB2H1_CCE 77
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#define CLK_TVOUT 78
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#define CLK_THERMAL_SENSOR 79
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#define CLK_IRC_SWITCH 80
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#define CLK_PCM1 81
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#define CLK_NR_CLKS (CLK_PCM1 + 1)
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#endif /* __DT_BINDINGS_CLOCK_S700_H */
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