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	Store a set of supported bitstream types in xilinx_desc structure. It will be used to determine whether an FPGA image is able to be loaded with a given driver. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
		
			
				
	
	
		
			18 lines
		
	
	
		
			341 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			18 lines
		
	
	
		
			341 B
		
	
	
	
		
			C
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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 * (C) Copyright 2019 Xilinx, Inc,
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 * Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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 */
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#ifndef _VERSALPL_H_
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#define _VERSALPL_H_
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#include <xilinx.h>
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#define VERSAL_PM_LOAD_PDI	0x701
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#define VERSAL_PM_PDI_TYPE	0xF
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extern struct xilinx_fpga_op versal_op;
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#endif /* _VERSALPL_H_ */
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