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https://github.com/smaeul/u-boot.git
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100 lines
2.0 KiB
C
100 lines
2.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2022 StarFive Technology Co., Ltd.
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* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <fdt_support.h>
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#include <env.h>
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#include <asm/arch/eeprom.h>
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#include <asm/io.h>
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#include <asm/sections.h>
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#include <linux/bitops.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define JH7110_L2_PREFETCHER_BASE_ADDR 0x2030000
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#define JH7110_L2_PREFETCHER_HART_OFFSET 0x2000
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#define FDTFILE_VISIONFIVE2_1_2A \
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"starfive/jh7110-starfive-visionfive-2-v1.2a.dtb"
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#define FDTFILE_VISIONFIVE2_1_3B \
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"starfive/jh7110-starfive-visionfive-2-v1.3b.dtb"
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/* enable U74-mc hart1~hart4 prefetcher */
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static void enable_prefetcher(void)
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{
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u8 hart;
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u32 *reg;
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/* JH7110 use U74MC CORE IP, it include five cores(one S7 and four U7),
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* but only U7 cores support prefetcher configuration
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*/
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for (hart = 1; hart < 5; hart++) {
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reg = (void *)(u64)(JH7110_L2_PREFETCHER_BASE_ADDR
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+ hart * JH7110_L2_PREFETCHER_HART_OFFSET);
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mb(); /* memory barrier */
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setbits_le32(reg, 0x1);
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mb(); /* memory barrier */
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}
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}
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/**
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* set_fdtfile() - set the $fdtfile variable based on the board revision
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*/
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static void set_fdtfile(void)
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{
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u8 version;
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const char *fdtfile;
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version = get_pcb_revision_from_eeprom();
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switch (version) {
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case 'a':
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case 'A':
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fdtfile = FDTFILE_VISIONFIVE2_1_2A;
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break;
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case 'b':
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case 'B':
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default:
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fdtfile = FDTFILE_VISIONFIVE2_1_3B;
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break;
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};
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env_set("fdtfile", fdtfile);
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}
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int board_init(void)
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{
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enable_caches();
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enable_prefetcher();
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return 0;
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}
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int board_late_init(void)
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{
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if (CONFIG_IS_ENABLED(ID_EEPROM))
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set_fdtfile();
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return 0;
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}
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void *board_fdt_blob_setup(int *err)
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{
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*err = 0;
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if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
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if (gd->arch.firmware_fdt_addr)
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return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
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}
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return (ulong *)_end;
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}
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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return fdt_fixup_memory(blob, 0x40000000, gd->ram_size);
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}
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