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	Add J784S4 initialization files for initial SPL boot. config SYS_K3_MCU_SCRATCHPAD_BASE default value is same for J721E, J721S2, J784S4. So combined them into a single default. Signed-off-by: Hari Nagalla <hnagalla@ti.com> [ add firewall configurations and change the R5 MCU scratchpad ] Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
		
			
				
	
	
		
			60 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			60 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-or-later */
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| /*
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|  * K3: J784S4 SoC definitions, structures etc.
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|  *
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|  * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
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|  */
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| #ifndef __ASM_ARCH_J784S4_HARDWARE_H
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| #define __ASM_ARCH_J784S4_HARDWARE_H
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| 
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| #ifndef __ASSEMBLY__
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| #include <linux/bitops.h>
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| #endif
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| 
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| #define WKUP_CTRL_MMR0_BASE				0x43000000
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| #define MCU_CTRL_MMR0_BASE				0x40f00000
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| #define CTRL_MMR0_BASE					0x00100000
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| 
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| #define CTRLMMR_MAIN_DEVSTAT				(CTRL_MMR0_BASE + 0x30)
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| #define MAIN_DEVSTAT_BOOT_MODE_B_MASK			BIT(0)
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| #define MAIN_DEVSTAT_BOOT_MODE_B_SHIFT			0
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| #define MAIN_DEVSTAT_BKUP_BOOTMODE_MASK			GENMASK(3, 1)
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| #define MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT		1
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| #define MAIN_DEVSTAT_PRIM_BOOTMODE_MMC_PORT_MASK	BIT(6)
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| #define MAIN_DEVSTAT_PRIM_BOOTMODE_PORT_SHIFT		6
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| #define MAIN_DEVSTAT_BKUP_MMC_PORT_MASK			BIT(7)
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| #define MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT		7
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| 
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| #define CTRLMMR_WKUP_DEVSTAT				(WKUP_CTRL_MMR0_BASE + 0x30)
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| #define WKUP_DEVSTAT_PRIMARY_BOOTMODE_MASK		GENMASK(5, 3)
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| #define WKUP_DEVSTAT_PRIMARY_BOOTMODE_SHIFT		3
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| #define WKUP_DEVSTAT_MCU_ONLY_MASK			BIT(6)
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| #define WKUP_DEVSTAT_MCU_ONLY_SHIFT			6
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| 
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| /* ROM HANDOFF Structure location */
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| #define ROM_EXTENDED_BOOT_DATA_INFO			0x41cfdb00
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| 
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| /* MCU SCRATCHPAD usage */
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| #define TI_SRAM_SCRATCH_BOARD_EEPROM_START	CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
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| 
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| #if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
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| 
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| #define J784S4_DEV_MCU_RTI0			367
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| #define J784S4_DEV_MCU_RTI1			368
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| #define J784S4_DEV_MCU_ARMSS0_CPU0		346
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| #define J784S4_DEV_MCU_ARMSS0_CPU1		347
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| 
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| static const u32 put_device_ids[] = {
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| 	J784S4_DEV_MCU_RTI0,
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| 	J784S4_DEV_MCU_RTI1,
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| };
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| 
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| static const u32 put_core_ids[] = {
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| 	J784S4_DEV_MCU_ARMSS0_CPU1,
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| 	J784S4_DEV_MCU_ARMSS0_CPU0,     /* Handle CPU0 after CPU1 */
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| };
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| 
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| #endif
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| 
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| #endif /* __ASM_ARCH_J784S4_HARDWARE_H */
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