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9344efc9bb
Add True Random Number Generator (TRNG) driver for Exynos chips. This implementation is heavily based on Linux kernel's counterpart [1]. It also follows upstream dt-bindings [2]. TRNG block is usually a part of SSS (Security Sub System) IP-core on Exynos chips. Because SSS access on Exynos850 is protected by TZPC (TrustZone Protection Control), it's not possible to read/write TRNG registers from U-Boot, as it's running in EL1 mode. Instead, the corresponding SMC calls should be used to make the secure software running in EL3 mode access it for us. Those SMC calls are handled by LDFW (Loadable Firmware), which has to be loaded first. For example, for E850-96 board it's done in its board_init(), so by the time RNG capabilities are needed the LDFW should be already loaded and TRNG should be functional. [1] drivers/char/hw_random/exynos-trng.c [2] dts/upstream/Bindings/rng/samsung,exynos5250-trng.yaml Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
22 lines
750 B
Makefile
22 lines
750 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2019, Linaro Limited
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#
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obj-$(CONFIG_$(SPL_TPL_)DM_RNG) += rng-uclass.o
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obj-$(CONFIG_RNG_MESON) += meson-rng.o
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obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
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obj-$(CONFIG_RNG_MSM) += msm_rng.o
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obj-$(CONFIG_RNG_NPCM) += npcm_rng.o
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obj-$(CONFIG_RNG_OPTEE) += optee_rng.o
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obj-$(CONFIG_RNG_STM32) += stm32_rng.o
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obj-$(CONFIG_RNG_RISCV_ZKR) += riscv_zkr_rng.o
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obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o
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obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o
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obj-$(CONFIG_RNG_SMCCC_TRNG) += smccc_trng.o
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obj-$(CONFIG_RNG_ARM_RNDR) += arm_rndr.o
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obj-$(CONFIG_TPM_RNG) += tpm_rng.o
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obj-$(CONFIG_RNG_JH7110) += jh7110_rng.o
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obj-$(CONFIG_RNG_TURRIS_RWTM) += turris_rwtm_rng.o
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obj-$(CONFIG_RNG_EXYNOS) += exynos-trng.o
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