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			43 lines
		
	
	
		
			913 B
		
	
	
	
		
			YAML
		
	
	
	
	
	
			
		
		
	
	
			43 lines
		
	
	
		
			913 B
		
	
	
	
		
			YAML
		
	
	
	
	
	
| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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| %YAML 1.2
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| ---
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| $id: http://devicetree.org/schemas/memory-controllers/calxeda-ddr-ctrlr.yaml#
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| $schema: http://devicetree.org/meta-schemas/core.yaml#
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| 
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| title: Calxeda DDR memory controller
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| 
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| description: |
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|   The Calxeda DDR memory controller is initialised and programmed by the
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|   firmware, but an OS might want to read its registers for error reporting
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|   purposes and to learn about the DRAM topology.
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| 
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| maintainers:
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|   - Andre Przywara <andre.przywara@arm.com>
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| 
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| properties:
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|   compatible:
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|     enum:
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|       - calxeda,hb-ddr-ctrl
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|       - calxeda,ecx-2000-ddr-ctrl
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| 
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|   reg:
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|     maxItems: 1
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| 
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|   interrupts:
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|     maxItems: 1
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| 
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| required:
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|   - compatible
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|   - reg
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|   - interrupts
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| 
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| additionalProperties: false
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| 
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| examples:
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|   - |
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|     memory-controller@fff00000 {
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|         compatible = "calxeda,hb-ddr-ctrl";
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|         reg = <0xfff00000 0x1000>;
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|         interrupts = <0 91 4>;
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|     };
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