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147 lines
3.8 KiB
YAML
147 lines
3.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: LPDDR channel with chip/rank topology description
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description:
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An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,
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CK, etc.) that connect one or more LPDDR chips to a host system. The main
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purpose of this node is to overall LPDDR topology of the system, including the
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amount of individual LPDDR chips and the ranks per chip.
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maintainers:
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- Julius Werner <jwerner@chromium.org>
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properties:
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compatible:
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enum:
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- jedec,lpddr2-channel
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- jedec,lpddr3-channel
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- jedec,lpddr4-channel
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- jedec,lpddr5-channel
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io-width:
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description:
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The number of DQ pins in the channel. If this number is different
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from (a multiple of) the io-width of the LPDDR chip, that means that
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multiple instances of that type of chip are wired in parallel on this
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channel (with the channel's DQ pins split up between the different
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chips, and the CA, CS, etc. pins of the different chips all shorted
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together). This means that the total physical memory controlled by a
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channel is equal to the sum of the densities of each rank on the
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connected LPDDR chip, times the io-width of the channel divided by
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the io-width of the LPDDR chip.
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enum:
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- 8
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- 16
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- 32
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- 64
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- 128
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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patternProperties:
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"^rank@[0-9]+$":
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type: object
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description:
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Each physical LPDDR chip may have one or more ranks. Ranks are
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internal but fully independent sub-units of the chip. Each LPDDR bus
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transaction on the channel targets exactly one rank, based on the
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state of the CS pins. Different ranks may have different densities and
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timing requirements.
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required:
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- reg
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: jedec,lpddr2-channel
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then:
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patternProperties:
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"^rank@[0-9]+$":
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$ref: /schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: jedec,lpddr3-channel
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then:
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patternProperties:
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"^rank@[0-9]+$":
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$ref: /schemas/memory-controllers/ddr/jedec,lpddr3.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: jedec,lpddr4-channel
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then:
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patternProperties:
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"^rank@[0-9]+$":
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$ref: /schemas/memory-controllers/ddr/jedec,lpddr4.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: jedec,lpddr5-channel
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then:
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patternProperties:
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"^rank@[0-9]+$":
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$ref: /schemas/memory-controllers/ddr/jedec,lpddr5.yaml#
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required:
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- compatible
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- io-width
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- "#address-cells"
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- "#size-cells"
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additionalProperties: false
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examples:
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- |
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lpddr-channel0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "jedec,lpddr3-channel";
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io-width = <32>;
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rank@0 {
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compatible = "lpddr3-ff,0100", "jedec,lpddr3";
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reg = <0>;
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density = <8192>;
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io-width = <16>;
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revision-id = <1 0>;
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};
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};
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lpddr-channel1 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "jedec,lpddr4-channel";
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io-width = <32>;
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rank@0 {
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compatible = "lpddr4-05,0301", "jedec,lpddr4";
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reg = <0>;
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density = <4096>;
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io-width = <32>;
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revision-id = <3 1>;
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};
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rank@1 {
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compatible = "lpddr4-05,0301", "jedec,lpddr4";
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reg = <1>;
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density = <2048>;
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io-width = <32>;
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revision-id = <3 1>;
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};
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};
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