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	Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
		
			
				
	
	
		
			183 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			183 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0+
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/*
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 * Copyright (C) 2019 Marvell International Ltd.
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 * Copyright (C) 2021 Stefan Roese <sr@denx.de>
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 */
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#include <dm.h>
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#include <dm/uclass.h>
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#include <errno.h>
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#include <input.h>
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#include <iomux.h>
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#include <log.h>
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#include <serial.h>
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#include <stdio_dev.h>
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#include <string.h>
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#include <watchdog.h>
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#include <linux/delay.h>
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#include <asm/addrspace.h>
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#include <asm/io.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-bootmem.h>
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#define DRIVER_NAME				"pci-bootcmd"
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/*
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 * Important:
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 * This address cannot be changed as the PCI console tool relies on exactly
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 * this value!
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 */
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#define BOOTLOADER_PCI_READ_BUFFER_BASE		0x6c000
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#define BOOTLOADER_PCI_READ_BUFFER_SIZE		256
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#define BOOTLOADER_PCI_WRITE_BUFFER_SIZE	256
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#define BOOTLOADER_PCI_READ_BUFFER_STR_LEN	\
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	(BOOTLOADER_PCI_READ_BUFFER_SIZE - 8)
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#define BOOTLOADER_PCI_WRITE_BUFFER_STR_LEN	\
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	(BOOTLOADER_PCI_WRITE_BUFFER_SIZE - 8)
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#define BOOTLOADER_PCI_READ_BUFFER_OWNER_ADDR	\
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	(BOOTLOADER_PCI_READ_BUFFER_BASE + 0)
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#define BOOTLOADER_PCI_READ_BUFFER_LEN_ADDR	\
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	(BOOTLOADER_PCI_READ_BUFFER_BASE + 4)
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#define BOOTLOADER_PCI_READ_BUFFER_DATA_ADDR	\
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	(BOOTLOADER_PCI_READ_BUFFER_BASE + 8)
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enum octeon_pci_io_buf_owner {
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	/* Must be zero, set when memory cleared */
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	OCTEON_PCI_IO_BUF_OWNER_INVALID = 0,
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	OCTEON_PCI_IO_BUF_OWNER_OCTEON = 1,
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	OCTEON_PCI_IO_BUF_OWNER_HOST = 2,
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};
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/* Structure for bootloader PCI IO buffers */
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struct octeon_pci_io_buf {
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	u32 owner;
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	u32 len;
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	char data[0];
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};
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struct octeon_bootcmd_priv {
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	bool started;
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	int copy_offset;
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	bool eol;
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	bool unlocked;
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	struct octeon_pci_io_buf *buf;
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};
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static int octeon_bootcmd_pending(struct udevice *dev, bool input)
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{
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	struct octeon_bootcmd_priv *priv = dev_get_priv(dev);
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	if (!input)
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		return 0;
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	if (priv->eol)
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		return 1;
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	CVMX_SYNC;
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	if (priv->buf->owner != OCTEON_PCI_IO_BUF_OWNER_OCTEON)
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		return 0;
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	if (priv->buf->len > priv->copy_offset &&
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	    (priv->buf->data[priv->copy_offset] != '\0'))
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		return 1;
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	return 0;
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}
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static int octeon_bootcmd_getc(struct udevice *dev)
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{
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	struct octeon_bootcmd_priv *priv = dev_get_priv(dev);
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	char c;
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	/* There's no EOL for boot commands so we fake it. */
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	if (priv->eol) {
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		priv->eol = false;
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		return '\n';
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	}
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	while (!octeon_bootcmd_pending(dev, true)) {
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		schedule();
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		/*
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		 * ToDo:
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		 * The original code calls octeon_board_poll() here. We may
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		 * need to implement something similar here.
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		 */
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		udelay(100);
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	}
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	c = priv->buf->data[priv->copy_offset];
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	priv->buf->data[priv->copy_offset++] = '\0';
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	if (priv->copy_offset >= min_t(int, CONFIG_SYS_CBSIZE - 1,
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				       BOOTLOADER_PCI_READ_BUFFER_STR_LEN - 1) ||
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	    (priv->buf->data[priv->copy_offset] == '\0')) {
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		priv->copy_offset = 0;
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		priv->buf->len = 0;
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		priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_HOST;
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		priv->eol = true;
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		CVMX_SYNC;
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	}
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	return c;
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}
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static const struct dm_serial_ops octeon_bootcmd_ops = {
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	.getc = octeon_bootcmd_getc,
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	.pending = octeon_bootcmd_pending,
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};
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static int octeon_bootcmd_probe(struct udevice *dev)
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{
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	struct octeon_bootcmd_priv *priv = dev_get_priv(dev);
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	priv->buf = (void *)CKSEG0ADDR(BOOTLOADER_PCI_READ_BUFFER_BASE);
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	memset(priv->buf, 0, BOOTLOADER_PCI_READ_BUFFER_SIZE);
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	priv->eol = false;
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	/*
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	 * When the bootcmd console is first started it is started as locked to
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	 * block any calls sending a command until U-Boot is ready to accept
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	 * commands.  Just before the main loop starts to accept commands the
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	 * bootcmd console is unlocked.
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	 */
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	if (priv->unlocked)
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		priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_HOST;
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	else
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		priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_OCTEON;
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	debug("%s called, buffer ptr: 0x%p, owner: %s\n", __func__,
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	      priv->buf,
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	      priv->buf->owner == OCTEON_PCI_IO_BUF_OWNER_HOST ?
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	      "host" : "octeon");
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	debug("&priv->copy_offset: 0x%p\n", &priv->copy_offset);
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	CVMX_SYNC;
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	/*
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	 * Perhaps reinvestige this: In the original code, "unlocked" etc
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	 * is set in the octeon_pci_bootcmd_unlock() function called very
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	 * late.
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	 */
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	priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_HOST;
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	priv->unlocked = true;
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	priv->started = true;
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	CVMX_SYNC;
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	return 0;
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}
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static const struct udevice_id octeon_bootcmd_serial_id[] = {
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	{ .compatible = "marvell,pci-bootcmd", },
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	{ },
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};
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U_BOOT_DRIVER(octeon_bootcmd) = {
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	.name = DRIVER_NAME,
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	.id = UCLASS_SERIAL,
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	.ops = &octeon_bootcmd_ops,
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	.of_match = of_match_ptr(octeon_bootcmd_serial_id),
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	.probe = octeon_bootcmd_probe,
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	.priv_auto = sizeof(struct octeon_bootcmd_priv),
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};
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