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https://github.com/smaeul/u-boot.git
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3da428595e
This patch adds the DDR calibration portion of the Altera SDRAM driver. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
85 lines
1.2 KiB
C
85 lines
1.2 KiB
C
/*
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* Copyright Altera Corporation (C) 2012-2015
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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const uint32_t ac_rom_init[] = {
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#ifdef CONFIG_SOCFPGA_ARRIA5
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/* The if..else... is not required if generated by tools */
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0x20700000,
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0x20780000,
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0x10080831,
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0x10080930,
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0x10090004,
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0x100a0008,
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0x100b0000,
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0x10380400,
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0x10080849,
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0x100808c8,
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0x100a0004,
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0x10090010,
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0x100b0000,
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0x30780000,
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0x38780000,
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0x30780000,
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0x10680000,
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0x106b0000,
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0x10280400,
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0x10480000,
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0x1c980000,
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0x1c9b0000,
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0x1c980008,
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0x1c9b0008,
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0x38f80000,
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0x3cf80000,
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0x38780000,
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0x18180000,
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0x18980000,
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0x13580000,
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0x135b0000,
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0x13580008,
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0x135b0008,
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0x33780000,
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0x10580008,
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0x10780000
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#else
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0x20700000,
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0x20780000,
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0x10080431,
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0x10080530,
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0x10090004,
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0x100a0008,
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0x100b0000,
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0x10380400,
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0x10080449,
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0x100804c8,
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0x100a0004,
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0x10090010,
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0x100b0000,
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0x30780000,
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0x38780000,
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0x30780000,
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0x10680000,
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0x106b0000,
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0x10280400,
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0x10480000,
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0x1c980000,
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0x1c9b0000,
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0x1c980008,
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0x1c9b0008,
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0x38f80000,
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0x3cf80000,
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0x38780000,
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0x18180000,
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0x18980000,
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0x13580000,
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0x135b0000,
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0x13580008,
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0x135b0008,
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0x33780000,
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0x10580008,
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0x10780000
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#endif /* CONFIG_SOCFPGA_ARRIA5 */
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};
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