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	Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
		
			
				
	
	
		
			90 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			90 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * (C) Copyright 2007
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|  * Stefan Roese, DENX Software Engineering, sr@denx.de.
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <config.h>
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| #include <common.h>
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| #include <command.h>
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| #include <asm/processor.h>
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| #include <asm/io.h>
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| #include <asm/ppc4xx-gpio.h>
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| #include <i2c.h>
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| 
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| #if defined(CONFIG_ZEUS)
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| 
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| u8 buf_zeus_ce[] = {
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| /*00    01    02    03    04    05    06    07 */
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|   0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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| /*08    09    0a    0b    0c    0d    0e    0f */
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|   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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| /*10    11    12    13    14    15    16    17 */
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|   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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| /*18    19    1a    1b    1c    1d    1e    1f */
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|   0x00, 0xc0, 0x50, 0x12, 0x72, 0x3e, 0x00, 0x00 };
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| 
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| u8 buf_zeus_pe[] = {
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| 
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| /* CPU_CLOCK_DIV 1    = 00
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|    CPU_PLB_FREQ_DIV 3 = 10
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|    OPB_PLB_FREQ_DIV 2 = 01
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|    EBC_PLB_FREQ_DIV 2 = 00
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|    MAL_PLB_FREQ_DIV 1 = 00
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|    PCI_PLB_FRQ_DIV 3  = 10
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|    PLL_PLLOUTA        = IS SET
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|    PLL_OPERATING      = IS NOT SET
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|    PLL_FDB_MUL 10     = 1010
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|    PLL_FWD_DIV_A 3    = 101
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|    PLL_FWD_DIV_B 3    = 101
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|    TUNE               = 0x2be */
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| /*00    01    02    03    04    05    06    07 */
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|   0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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| /*08    09    0a    0b    0c    0d    0e    0f */
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|   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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| /*10    11    12    13    14    15    16    17 */
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|   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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| /*18    19    1a    1b    1c    1d    1e    1f */
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|   0x00, 0x60, 0x68, 0x2d, 0x42, 0xbe, 0x00, 0x00 };
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| 
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| static int update_boot_eeprom(void)
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| {
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| 	u32 len = 0x20;
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| 	u8 chip = CONFIG_SYS_I2C_EEPROM_ADDR;
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| 	u8 *pbuf;
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| 	u8 base;
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| 	int i;
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| 
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| 	if (in_be32((void *)GPIO0_IR) & GPIO_VAL(CONFIG_SYS_GPIO_ZEUS_PE)) {
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| 		pbuf = buf_zeus_pe;
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| 		base = 0x40;
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| 	} else {
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| 		pbuf = buf_zeus_ce;
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| 		base = 0x00;
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| 	}
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| 
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| 	for (i = 0; i < len; i++, base++) {
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| 		if (i2c_write(chip, base, 1, &pbuf[i], 1) != 0) {
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| 			printf("i2c_write fail\n");
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| 			return 1;
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| 		}
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| 		udelay(11000);
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| int do_update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char * const argv[])
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| {
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| 	return update_boot_eeprom();
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| }
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| 
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| U_BOOT_CMD (
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| 	update_boot_eeprom, 1, 1, do_update_boot_eeprom,
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| 	"update boot eeprom content",
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| 	""
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| );
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| 
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| #endif
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