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			70 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			70 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * cs42l42.h -- CS42L42 ALSA SoC audio driver DT bindings header
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|  *
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|  * Copyright 2016 Cirrus Logic, Inc.
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|  *
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|  * Author: James Schulman <james.schulman@cirrus.com>
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|  * Author: Brian Austin <brian.austin@cirrus.com>
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|  * Author: Michael White <michael.white@cirrus.com>
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|  */
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| 
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| #ifndef __DT_CS42L42_H
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| #define __DT_CS42L42_H
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| 
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| /* HPOUT Load Capacity */
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| #define CS42L42_HPOUT_LOAD_1NF		0
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| #define CS42L42_HPOUT_LOAD_10NF		1
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| 
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| /* HPOUT Clamp to GND Override */
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| #define CS42L42_HPOUT_CLAMP_EN		0
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| #define CS42L42_HPOUT_CLAMP_DIS		1
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| 
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| /* Tip Sense Inversion */
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| #define CS42L42_TS_INV_DIS			0
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| #define CS42L42_TS_INV_EN			1
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| 
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| /* Tip Sense Debounce */
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| #define CS42L42_TS_DBNCE_0			0
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| #define CS42L42_TS_DBNCE_125			1
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| #define CS42L42_TS_DBNCE_250			2
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| #define CS42L42_TS_DBNCE_500			3
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| #define CS42L42_TS_DBNCE_750			4
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| #define CS42L42_TS_DBNCE_1000			5
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| #define CS42L42_TS_DBNCE_1250			6
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| #define CS42L42_TS_DBNCE_1500			7
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| 
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| /* Button Press Software Debounce Times */
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| #define CS42L42_BTN_DET_INIT_DBNCE_MIN		0
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| #define CS42L42_BTN_DET_INIT_DBNCE_DEFAULT	100
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| #define CS42L42_BTN_DET_INIT_DBNCE_MAX		200
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| 
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| #define CS42L42_BTN_DET_EVENT_DBNCE_MIN		0
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| #define CS42L42_BTN_DET_EVENT_DBNCE_DEFAULT	10
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| #define CS42L42_BTN_DET_EVENT_DBNCE_MAX		20
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| 
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| /* Button Detect Level Sensitivities */
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| #define CS42L42_NUM_BIASES		4
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| 
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| #define CS42L42_HS_DET_LEVEL_15		0x0F
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| #define CS42L42_HS_DET_LEVEL_8		0x08
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| #define CS42L42_HS_DET_LEVEL_4		0x04
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| #define CS42L42_HS_DET_LEVEL_1		0x01
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| 
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| #define CS42L42_HS_DET_LEVEL_MIN	0
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| #define CS42L42_HS_DET_LEVEL_MAX	0x3F
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| 
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| /* HS Bias Ramp Rate */
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| 
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| #define CS42L42_HSBIAS_RAMP_FAST_RISE_SLOW_FALL		0
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| #define CS42L42_HSBIAS_RAMP_FAST			1
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| #define CS42L42_HSBIAS_RAMP_SLOW			2
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| #define CS42L42_HSBIAS_RAMP_SLOWEST			3
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| 
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| #define CS42L42_HSBIAS_RAMP_TIME0			10
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| #define CS42L42_HSBIAS_RAMP_TIME1			40
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| #define CS42L42_HSBIAS_RAMP_TIME2			90
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| #define CS42L42_HSBIAS_RAMP_TIME3			170
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| 
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| #endif /* __DT_CS42L42_H */
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