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03de305ec4
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
124 lines
3.0 KiB
C
124 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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#include <asm/io.h>
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#include <memalign.h>
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#include <nand.h>
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <dm.h>
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#include "brcmnand.h"
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struct bcm6753_nand_soc {
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struct brcmnand_soc soc;
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void __iomem *base;
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};
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#define BCM6753_NAND_INT 0x00
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#define BCM6753_NAND_STATUS_SHIFT 0
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#define BCM6753_NAND_STATUS_MASK (0xfff << BCM6753_NAND_STATUS_SHIFT)
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#define BCM6753_NAND_INT_EN 0x04
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#define BCM6753_NAND_ENABLE_SHIFT 0
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#define BCM6753_NAND_ENABLE_MASK (0xffff << BCM6753_NAND_ENABLE_SHIFT)
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enum {
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BCM6753_NP_READ = BIT(0),
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BCM6753_BLOCK_ERASE = BIT(1),
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BCM6753_COPY_BACK = BIT(2),
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BCM6753_PAGE_PGM = BIT(3),
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BCM6753_CTRL_READY = BIT(4),
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BCM6753_DEV_RBPIN = BIT(5),
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BCM6753_ECC_ERR_UNC = BIT(6),
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BCM6753_ECC_ERR_CORR = BIT(7),
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};
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static bool bcm6753_nand_intc_ack(struct brcmnand_soc *soc)
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{
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struct bcm6753_nand_soc *priv =
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container_of(soc, struct bcm6753_nand_soc, soc);
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void __iomem *mmio = priv->base + BCM6753_NAND_INT;
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u32 val = brcmnand_readl(mmio);
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if (val & (BCM6753_CTRL_READY << BCM6753_NAND_STATUS_SHIFT)) {
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/* Ack interrupt */
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val &= ~BCM6753_NAND_STATUS_MASK;
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val |= BCM6753_CTRL_READY << BCM6753_NAND_STATUS_SHIFT;
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brcmnand_writel(val, mmio);
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return true;
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}
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return false;
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}
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static void bcm6753_nand_intc_set(struct brcmnand_soc *soc, bool en)
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{
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struct bcm6753_nand_soc *priv =
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container_of(soc, struct bcm6753_nand_soc, soc);
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void __iomem *mmio = priv->base + BCM6753_NAND_INT_EN;
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u32 val = brcmnand_readl(mmio);
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/* Don't ack any interrupts */
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val &= ~BCM6753_NAND_STATUS_MASK;
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if (en)
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val |= BCM6753_CTRL_READY << BCM6753_NAND_ENABLE_SHIFT;
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else
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val &= ~(BCM6753_CTRL_READY << BCM6753_NAND_ENABLE_SHIFT);
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brcmnand_writel(val, mmio);
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}
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static int bcm6753_nand_probe(struct udevice *dev)
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{
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struct udevice *pdev = dev;
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struct bcm6753_nand_soc *priv = dev_get_priv(dev);
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struct brcmnand_soc *soc;
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struct resource res;
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soc = &priv->soc;
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dev_read_resource_byname(pdev, "nand-int-base", &res);
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priv->base = devm_ioremap(dev, res.start, resource_size(&res));
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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soc->ctlrdy_ack = bcm6753_nand_intc_ack;
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soc->ctlrdy_set_enabled = bcm6753_nand_intc_set;
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/* Disable and ack all interrupts */
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brcmnand_writel(0, priv->base + BCM6753_NAND_INT_EN);
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brcmnand_writel(0, priv->base + BCM6753_NAND_INT);
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return brcmnand_probe(pdev, soc);
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}
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static const struct udevice_id bcm6753_nand_dt_ids[] = {
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{
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.compatible = "brcm,nand-bcm6753",
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},
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(bcm6753_nand) = {
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.name = "bcm6753-nand",
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.id = UCLASS_MTD,
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.of_match = bcm6753_nand_dt_ids,
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.probe = bcm6753_nand_probe,
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.priv_auto = sizeof(struct bcm6753_nand_soc),
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};
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void board_nand_init(void)
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{
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struct udevice *dev;
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int ret;
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ret = uclass_get_device_by_driver(UCLASS_MTD,
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DM_DRIVER_GET(bcm6753_nand), &dev);
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if (ret && ret != -ENODEV)
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pr_err("Failed to initialize %s. (error %d)\n", dev->name,
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ret);
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}
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