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This binding documents two properties that describe the registers used to perform MUX selection. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
83 lines
1.8 KiB
Plaintext
83 lines
1.8 KiB
Plaintext
Device tree structures used by register based MDIO muxes is described here.
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This binding is based on reg-mux.txt binding in Linux and is currently used by
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mdio-mux-i2creg driver in U-Boot.
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Required properties:
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#mux-control-cells = <1> indicates how many registers are used for mux
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selection. mux-reg-mask property described below must
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include this number of pairs.
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mux-reg-masks = <reg mask> describes pairs of register offset and register mask.
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Register bits enabled in mask are set to the selection
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value defined in reg property of child MDIOs to control
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selection.
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Properties described in mdio-mux.txt also apply.
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Example structure, used on Freescale LS1028A QDS board:
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&i2c0 {
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status = "okay";
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u-boot,dm-pre-reloc;
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fpga@66 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "simple-mfd";
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reg = <0x66>;
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mux-mdio@54 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "mdio-mux-i2creg";
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reg = <0x54>;
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#mux-control-cells = <1>;
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mux-reg-masks = <0x54 0xf0>;
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mdio-parent-bus = <&mdio0>;
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/* on-board MDIO with a single RGMII PHY */
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mdio@00 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x00>;
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/* on-board 1G RGMII PHY */
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qds_phy0: phy@5 {
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reg = <5>;
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};
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};
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/* card slot 1 */
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mdio@40 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40>;
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/* VSC8234 1G SGMII card */
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sgmii_port0: phy@1c {
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reg = <0x1c>;
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};
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};
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/* card slot 2 */
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mdio@50 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x50>;
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};
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/* card slot 3 */
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mdio@60 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x60>;
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};
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/* card slot 4 */
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mdio@70 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x70>;
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};
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};
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};
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};
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/* Parent MDIO, defined in SoC .dtsi file, just enabled here */
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&mdio0 {
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status = "okay";
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};
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