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	Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
		
			
				
	
	
		
			334 lines
		
	
	
		
			8.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			334 lines
		
	
	
		
			8.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * (C) Copyright 2000
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|  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <common.h>
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| #include <commproc.h>
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| #include <mpc8xx_irq.h>
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| #include <exports.h>
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| #undef	DEBUG
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| 
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| #define	TIMER_PERIOD	1000000		/* 1 second clock */
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| 
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| static void timer_handler (void *arg);
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| 
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| 
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| /* Access functions for the Machine State Register */
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| static __inline__ unsigned long get_msr(void)
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| {
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|     unsigned long msr;
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| 
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|     asm volatile("mfmsr %0" : "=r" (msr) :);
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|     return msr;
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| }
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| 
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| static __inline__ void set_msr(unsigned long msr)
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| {
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|     asm volatile("mtmsr %0" : : "r" (msr));
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| }
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| 
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| /*
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|  * Definitions to access the CPM Timer registers
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|  * See 8xx_immap.h for Internal Memory Map layout,
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|  * and commproc.h for CPM Interrupt vectors (aka "IRQ"s)
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|  */
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| 
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| typedef struct tid_8xx_cpmtimer_s {
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|   int		 cpm_vec;	/* CPM Interrupt Vector for this timer	*/
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|   ushort	*tgcrp;		/* Pointer to Timer Global Config Reg.	*/
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|   ushort	*tmrp;		/* Pointer to Timer Mode Register	*/
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|   ushort	*trrp;		/* Pointer to Timer Reference Register	*/
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|   ushort	*tcrp;		/* Pointer to Timer Capture Register	*/
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|   ushort	*tcnp;		/* Pointer to Timer Counter Register	*/
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|   ushort	*terp;		/* Pointer to Timer Event Register	*/
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| } tid_8xx_cpmtimer_t;
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| 
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| #ifndef CLOCKRATE
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| #  define CLOCKRATE 64
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| #endif
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| 
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| #define	CPMT_CLOCK_DIV		16
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| #define	CPMT_MAX_PRESCALER	256
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| #define CPMT_MAX_REFERENCE	65535	/* max. unsigned short */
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| 
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| #define	CPMT_MAX_TICKS		(CPMT_MAX_REFERENCE * CPMT_MAX_PRESCALER)
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| #define	CPMT_MAX_TICKS_WITH_DIV	(CPMT_MAX_REFERENCE * CPMT_MAX_PRESCALER * CPMT_CLOCK_DIV)
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| #define	CPMT_MAX_INTERVAL	(CPMT_MAX_TICKS_WITH_DIV / CLOCKRATE)
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| 
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| /* For now: always use max. prescaler value */
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| #define	CPMT_PRESCALER		(CPMT_MAX_PRESCALER)
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| 
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| /* CPM Timer Event Register Bits */
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| #define	CPMT_EVENT_CAP		0x0001	/* Capture Event		*/
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| #define	CPMT_EVENT_REF		0x0002	/* Reference Counter Event	*/
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| 
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| /* CPM Timer Global Config Register */
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| #define	CPMT_GCR_RST		0x0001	/* Reset  Timer			*/
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| #define	CPMT_GCR_STP		0x0002	/* Stop   Timer			*/
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| #define	CPMT_GCR_FRZ		0x0004	/* Freeze Timer			*/
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| #define	CPMT_GCR_GM_CAS		0x0008	/* Gate Mode / Cascade Timers	*/
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| #define	CPMT_GCR_MASK		(CPMT_GCR_RST|CPMT_GCR_STP|CPMT_GCR_FRZ|CPMT_GCR_GM_CAS)
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| 
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| /* CPM Timer Mode register */
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| #define	CPMT_MR_GE		0x0001	/* Gate Enable			*/
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| #define	CPMT_MR_ICLK_CASC	0x0000	/* Clock internally cascaded	*/
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| #define	CPMT_MR_ICLK_CLK	0x0002	/* Clock = system clock		*/
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| #define	CPMT_MR_ICLK_CLKDIV	0x0004	/* Clock = system clock / 16	*/
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| #define	CPMT_MR_ICLK_TIN	0x0006	/* Clock = TINx signal		*/
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| #define	CPMT_MR_FRR		0x0008	/* Free Run / Restart		*/
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| #define	CPMT_MR_ORI		0x0010	/* Out. Reference Interrupt En.	*/
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| #define	CPMT_MR_OM		0x0020	/* Output Mode			*/
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| #define	CPMT_MR_CE_DIS		0x0000	/* Capture/Interrupt disabled	*/
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| #define	CPMT_MR_CE_RISE		0x0040	/* Capt./Interr. on rising  TIN	*/
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| #define CPMT_MR_CE_FALL		0x0080	/* Capt./Interr. on falling TIN	*/
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| #define	CPMT_MR_CE_ANY		0x00C0	/* Capt./Interr. on any TIN edge*/
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| 
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| 
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| /*
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|  * which CPM timer to use - index starts at 0 (= timer 1)
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|  */
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| #define	TID_TIMER_ID	0	/* use CPM timer 1		*/
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| 
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| void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval);
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| 
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| static const char usage[] = "\n[q, b, e, ?] ";
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| 
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| int timer (int argc, char * const argv[])
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| {
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| 	cpmtimer8xx_t *cpmtimerp;	/* Pointer to the CPM Timer structure   */
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| 	tid_8xx_cpmtimer_t hw;
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| 	tid_8xx_cpmtimer_t *hwp = &hw;
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| 	int c;
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| 	int running;
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| 
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| 	app_startup(argv);
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| 
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| 	/* Pointer to CPM Timer structure */
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| 	cpmtimerp = &((immap_t *) gd->bd->bi_immr_base)->im_cpmtimer;
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| 
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| 	printf ("TIMERS=0x%x\n", (unsigned) cpmtimerp);
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| 
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| 	/* Initialize pointers depending on which timer we use */
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| 	switch (TID_TIMER_ID) {
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| 	case 0:
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| 		hwp->tmrp = &(cpmtimerp->cpmt_tmr1);
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| 		hwp->trrp = &(cpmtimerp->cpmt_trr1);
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| 		hwp->tcrp = &(cpmtimerp->cpmt_tcr1);
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| 		hwp->tcnp = &(cpmtimerp->cpmt_tcn1);
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| 		hwp->terp = &(cpmtimerp->cpmt_ter1);
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| 		hwp->cpm_vec = CPMVEC_TIMER1;
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| 		break;
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| 	case 1:
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| 		hwp->tmrp = &(cpmtimerp->cpmt_tmr2);
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| 		hwp->trrp = &(cpmtimerp->cpmt_trr2);
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| 		hwp->tcrp = &(cpmtimerp->cpmt_tcr2);
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| 		hwp->tcnp = &(cpmtimerp->cpmt_tcn2);
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| 		hwp->terp = &(cpmtimerp->cpmt_ter2);
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| 		hwp->cpm_vec = CPMVEC_TIMER2;
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| 		break;
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| 	case 2:
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| 		hwp->tmrp = &(cpmtimerp->cpmt_tmr3);
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| 		hwp->trrp = &(cpmtimerp->cpmt_trr3);
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| 		hwp->tcrp = &(cpmtimerp->cpmt_tcr3);
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| 		hwp->tcnp = &(cpmtimerp->cpmt_tcn3);
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| 		hwp->terp = &(cpmtimerp->cpmt_ter3);
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| 		hwp->cpm_vec = CPMVEC_TIMER3;
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| 		break;
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| 	case 3:
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| 		hwp->tmrp = &(cpmtimerp->cpmt_tmr4);
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| 		hwp->trrp = &(cpmtimerp->cpmt_trr4);
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| 		hwp->tcrp = &(cpmtimerp->cpmt_tcr4);
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| 		hwp->tcnp = &(cpmtimerp->cpmt_tcn4);
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| 		hwp->terp = &(cpmtimerp->cpmt_ter4);
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| 		hwp->cpm_vec = CPMVEC_TIMER4;
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| 		break;
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| 	}
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| 
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| 	hwp->tgcrp = &cpmtimerp->cpmt_tgcr;
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| 
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| 	printf ("Using timer %d\n"
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| 			"tgcr @ 0x%x, tmr @ 0x%x, trr @ 0x%x,"
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| 			" tcr @ 0x%x, tcn @ 0x%x, ter @ 0x%x\n",
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| 			TID_TIMER_ID + 1,
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| 			(unsigned) hwp->tgcrp,
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| 			(unsigned) hwp->tmrp,
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| 			(unsigned) hwp->trrp,
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| 			(unsigned) hwp->tcrp,
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| 			(unsigned) hwp->tcnp,
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| 			(unsigned) hwp->terp
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| 			);
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| 
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| 	/* reset timer    */
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| 	*hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
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| 
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| 	/* clear all events */
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| 	*hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
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| 
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| 	puts(usage);
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| 	running = 0;
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| 	while ((c = getc()) != 'q') {
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| 	    if (c == 'b') {
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| 
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| 		setPeriod (hwp, TIMER_PERIOD);	/* Set period and start ticking */
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| 
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| 		/* Install interrupt handler (enable timer in CIMR) */
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| 		install_hdlr (hwp->cpm_vec, timer_handler, hwp);
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| 
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| 		printf ("Enabling timer\n");
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| 
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| 		/* enable timer */
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| 		*hwp->tgcrp |= (CPMT_GCR_RST << TID_TIMER_ID);
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| 		running = 1;
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| 
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| #ifdef	DEBUG
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| 		printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
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| 			" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
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| 				*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
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| 				*hwp->tcrp,  *hwp->tcnp, *hwp->terp
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| 				);
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| #endif
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| 	    } else if (c == 'e') {
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| 
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| 		printf ("Stopping timer\n");
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| 
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| 		*hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
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| 		running = 0;
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| 
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| #ifdef	DEBUG
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| 		printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
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| 			" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
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| 				*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
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| 				*hwp->tcrp,  *hwp->tcnp, *hwp->terp
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| 			);
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| #endif
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| 		/* Uninstall interrupt handler */
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| 		free_hdlr (hwp->cpm_vec);
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| 
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| 	    } else if (c == '?') {
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| #ifdef	DEBUG
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| 		cpic8xx_t *cpm_icp = &((immap_t *) gd->bd->bi_immr_base)->im_cpic;
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| 		sysconf8xx_t *siup = &((immap_t *) gd->bd->bi_immr_base)->im_siu_conf;
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| #endif
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| 
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| 		printf ("\ntgcr=0x%x, tmr=0x%x, trr=0x%x,"
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| 			" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
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| 				*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
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| 				*hwp->tcrp,  *hwp->tcnp, *hwp->terp
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| 			);
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| #ifdef	DEBUG
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| 		printf ("SIUMCR=0x%08lx, SYPCR=0x%08lx,"
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| 			" SIMASK=0x%08lx, SIPEND=0x%08lx\n",
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| 				siup->sc_siumcr,
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| 				siup->sc_sypcr,
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| 				siup->sc_simask,
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| 				siup->sc_sipend
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| 			);
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| 
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| 		printf ("CIMR=0x%08lx, CICR=0x%08lx, CIPR=0x%08lx\n",
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| 			cpm_icp->cpic_cimr,
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| 			cpm_icp->cpic_cicr,
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| 			cpm_icp->cpic_cipr
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| 			);
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| #endif
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| 	    } else {
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| 		printf ("\nEnter: q - quit, b - start timer, e - stop timer, ? - get status\n");
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| 	    }
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| 	    puts(usage);
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| 	}
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| 	if (running) {
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| 		printf ("Stopping timer\n");
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| 		*hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
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| 		free_hdlr (hwp->cpm_vec);
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| 	}
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| 
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| 	return (0);
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| }
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| 
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| 
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| /* Set period in microseconds and start.
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|  * Truncate to maximum period if more than this is requested - but warn about it.
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|  */
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| 
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| void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval)
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| {
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| 	unsigned short prescaler;
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| 	unsigned long ticks;
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| 
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| 	printf ("Set interval %ld us\n", interval);
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| 
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| 	/* Warn if requesting longer period than possible */
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| 	if (interval > CPMT_MAX_INTERVAL) {
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| 		printf ("Truncate interval %ld to maximum (%d)\n",
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| 				interval, CPMT_MAX_INTERVAL);
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| 		interval = CPMT_MAX_INTERVAL;
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| 	}
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| 	/*
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| 	 * Check if we want to use clock divider:
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| 	 * Since the reference counter can be incremented only in integer steps,
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| 	 * we try to keep it as big as possible to allow the resulting period to be
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| 	 * as precise as possible.
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| 	 */
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| 	/* prescaler, enable interrupt, restart after ref count is reached */
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| 	prescaler = (ushort) ((CPMT_PRESCALER - 1) << 8) |
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| 			CPMT_MR_ORI |
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| 			CPMT_MR_FRR;
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| 
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| 	ticks = ((ulong) CLOCKRATE * interval);
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| 
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| 	if (ticks > CPMT_MAX_TICKS) {
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| 		ticks /= CPMT_CLOCK_DIV;
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| 		prescaler |= CPMT_MR_ICLK_CLKDIV;	/* use system clock divided by 16 */
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| 	} else {
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| 		prescaler |= CPMT_MR_ICLK_CLK;	/* use system clock without divider */
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| 	}
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| 
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| #ifdef	DEBUG
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| 	printf ("clock/%d, prescale factor %d, reference %ld, ticks %ld\n",
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| 			(ticks > CPMT_MAX_TICKS) ? CPMT_CLOCK_DIV : 1,
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| 			CPMT_PRESCALER,
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| 			(ticks / CPMT_PRESCALER),
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| 			ticks
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| 			);
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| #endif
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| 
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| 	/* set prescaler register */
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| 	*hwp->tmrp = prescaler;
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| 
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| 	/* clear timer counter */
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| 	*hwp->tcnp = 0;
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| 
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| 	/* set reference register */
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| 	*hwp->trrp = (unsigned short) (ticks / CPMT_PRESCALER);
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| 
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| #ifdef	DEBUG
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| 	printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
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| 		" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
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| 			*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
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| 			*hwp->tcrp,  *hwp->tcnp, *hwp->terp
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| 		);
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| #endif
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| }
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| 
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| /*
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|  * Handler for CPMVEC_TIMER1 interrupt
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|  */
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| static
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| void timer_handler (void *arg)
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| {
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| 	tid_8xx_cpmtimer_t *hwp = (tid_8xx_cpmtimer_t *)arg;
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| 
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| 	/* printf ("** TER1=%04x ** ", *hwp->terp); */
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| 
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| 	/* just for demonstration */
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| 	printf (".");
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| 
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| 	/* clear all possible events: Ref. and Cap. */
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| 	*hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
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| }
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