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a05eb8b14a
The 'enable-active-high' DTS property configures GPIO so it is active with HIGH state (by default it is low). The 'regulator-boot-on' property indicates that the regulator was enabled in the 'earlier' stage - i.e. bootloader/firmware. In the XEA case the 'fec-3v3' was configured (as a "wrapper" on GPIO0_0) in very early SPL code, so it shouldn't be modified at latter stages. Signed-off-by: Lukasz Majewski <lukma@denx.de>
113 lines
2.1 KiB
Plaintext
113 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019
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* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
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*
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* SPDX-License-Identifier: GPL-2.0+ or X11
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*
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*/
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/dts-v1/;
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#include "imx28.dtsi"
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/ {
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model = "Liebherr (LWE) XEA i.MX28 Board";
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compatible = "lwe,xea", "fsl,imx28";
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aliases {
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spi3 = &ssp3;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x40000000 0x10000000>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_fec_3v3: regulator-fec-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "fec-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-boot-on;
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};
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};
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&mac0 {
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phy-mode = "rmii";
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pinctrl-names = "default";
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pinctrl-0 = <&mac0_pins_a>;
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phy-supply = <®_fec_3v3>;
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phy-reset-gpios = <&gpio2 13 GPIO_ACTIVE_LOW>;
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phy-reset-duration = <1>;
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phy-reset-post-delay = <1>;
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status = "okay";
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fixed-link {
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speed = <100>;
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full-duplex;
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};
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};
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&ssp0 {
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compatible = "fsl,imx28-mmc";
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_8bit_pins_a>;
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bus-width = <8>;
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vmmc-supply = <®_3p3v>;
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non-removable;
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status = "okay";
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};
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&ssp3 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx28-spi";
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pinctrl-names = "default";
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pinctrl-0 = <&spi3_pins_b>;
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status = "okay";
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spi-max-frequency = <40000000>;
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num-cs = <2>;
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flash0: s25fl256s@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <40000000>;
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reg = <0>;
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partition@0 {
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label = "SPL (spi)";
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reg = <0x0 0x10000>;
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read-only;
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};
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partition@1 {
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label = "u-boot (spi)";
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reg = <0x10000 0x70000>;
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read-only;
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};
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partition@2 {
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label = "uboot-env (spi)";
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reg = <0x80000 0x20000>;
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};
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partition@3 {
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label = "kernel (spi)";
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reg = <0x100000 0x400000>;
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};
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partition@4 {
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label = "swupdate (spi)";
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reg = <0x50000 0x800000>;
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};
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};
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};
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