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smaeul-u-boot/arch/x86/cpu/intel_common
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Simon Glass f45e747d6d x86: Add support for newer CAR schemes 
Newer Intel SoCs have different ways of setting up cache-as-ram (CAR).
Add support for these along with suitable configuration options.

To make the code cleaner, adjust a few definitions in processor.h so that
they can be used from assembler.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:18 +08:00
..
car2_uninit.S
x86: Add support for newer CAR schemes
2019-12-15 11:44:18 +08:00
car2.S
x86: Add support for newer CAR schemes
2019-12-15 11:44:18 +08:00
car.S
x86: Update a stale comment about ifdtool
2019-05-08 13:02:10 +08:00
cpu_from_spl.c
x86: fsp: Save usable RAM and hob_list in the handoff area
2019-10-08 13:57:36 +08:00
cpu.c
x86: Add new common CPU functions for turbo/burst mode
2019-10-08 13:57:47 +08:00
fast_spi.c
x86: spi: Add helper functions for Intel Fast SPI
2019-12-15 11:44:08 +08:00
lpc.c
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
Makefile
x86: Add support for newer CAR schemes
2019-12-15 11:44:18 +08:00
me_status.c
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
microcode.c
x86: Use microcode update from device tree for all processors
2018-07-02 09:23:28 +08:00
mrc.c
common: Move board_get_usable_ram_top() out of common.h
2019-12-02 18:25:04 -05:00
pch.c
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
report_platform.c
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00