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	Intel Quark SoC has the same interrupt routing mechanism as the Queensbay platform, only the difference is that PCI devices' INTA/B/C/D are harcoded and cannot be changed freely. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
		
			
				
	
	
		
			69 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			69 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#ifndef _QUARK_DEVICE_H_
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#define _QUARK_DEVICE_H_
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#include <pci.h>
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#define QUARK_HOST_BRIDGE_DEV	0
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#define QUARK_HOST_BRIDGE_FUNC	0
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#define QUARK_DEV_20		20
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#define QUARK_MMC_SDIO_FUNC	0
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#define QUARK_UART0_FUNC	1
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#define QUARK_USB_DEVICE_FUNC	2
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#define QUARK_USB_EHCI_FUNC	3
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#define QUARK_USB_OHCI_FUNC	4
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#define QUARK_UART1_FUNC	5
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#define QUARK_EMAC0_FUNC	6
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#define QUARK_EMAC1_FUNC	7
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#define QUARK_DEV_21		21
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#define QUARK_SPI0_FUNC		0
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#define QUARK_SPI1_FUNC		1
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#define QUARK_I2C_GPIO_FUNC	2
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#define QUARK_DEV_23		23
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#define QUARK_PCIE0_FUNC	0
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#define QUARK_PCIE1_FUNC	1
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#define QUARK_LGC_BRIDGE_DEV	31
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#define QUARK_LGC_BRIDGE_FUNC	0
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#define QUARK_HOST_BRIDGE	\
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	PCI_BDF(0, QUARK_HOST_BRIDGE_DEV, QUARK_HOST_BRIDGE_FUNC)
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#define QUARK_MMC_SDIO		\
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	PCI_BDF(0, QUARK_DEV_20, QUARK_MMC_SDIO_FUNC)
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#define QUARK_UART0		\
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	PCI_BDF(0, QUARK_DEV_20, QUARK_UART0_FUNC)
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#define QUARK_USB_DEVICE	\
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	PCI_BDF(0, QUARK_DEV_20, QUARK_USB_DEVICE_FUNC)
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#define QUARK_USB_EHCI		\
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	PCI_BDF(0, QUARK_DEV_20, QUARK_USB_EHCI_FUNC)
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#define QUARK_USB_OHCI		\
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	PCI_BDF(0, QUARK_DEV_20, QUARK_USB_OHCI_FUNC)
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#define QUARK_UART1		\
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	PCI_BDF(0, QUARK_DEV_20, QUARK_UART1_FUNC)
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#define QUARK_EMAC0		\
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	PCI_BDF(0, QUARK_DEV_20, QUARK_EMAC0_FUNC)
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#define QUARK_EMAC1		\
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	PCI_BDF(0, QUARK_DEV_20, QUARK_EMAC1_FUNC)
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#define QUARK_SPI0		\
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	PCI_BDF(0, QUARK_DEV_21, QUARK_SPI0_FUNC)
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#define QUARK_SPI1		\
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	PCI_BDF(0, QUARK_DEV_21, QUARK_SPI1_FUNC)
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#define QUARK_I2C_GPIO		\
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	PCI_BDF(0, QUARK_DEV_21, QUARK_I2C_GPIO_FUNC)
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#define QUARK_PCIE0		\
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	PCI_BDF(0, QUARK_DEV_23, QUARK_PCIE0_FUNC)
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#define QUARK_PCIE1		\
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	PCI_BDF(0, QUARK_DEV_23, QUARK_PCIE1_FUNC)
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#define QUARK_LEGACY_BRIDGE	\
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	PCI_BDF(0, QUARK_LGC_BRIDGE_DEV, QUARK_LGC_BRIDGE_FUNC)
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#endif /* _QUARK_DEVICE_H_ */
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