mirror of
https://github.com/smaeul/u-boot.git
synced 2025-11-18 09:48:39 +00:00
fd1c2938c0
Instructions such as dcbi are in the X-form; they have RA and RB fields and the effective address (EA) is computed as (RA|0)+(RB). In words, this means that if RA is zero, the left-hand side of the addition is zero, otherwise the corresponding GPR is used. r0 can never be used on the left-hand side of a X-form instruction. For D-form instructions such as addis, the Power ISA illustrates this in the instruction pseudo-code: if RA = 0 then RT <- EXTS(SI || 0x0000) else RT <- (RA) + EXIS(SI || 0x0000) In all of these cases, RA=0 indicates the value zero, not register r0. I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig (MPC85xx) that this patch results in the same machine code. Signed-off-by: J. Neuschäfer <j.ne@posteo.net>