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595232ad1f
Drop the old pre-driver model code from these drivers. Signed-off-by: Simon Glass <sjg@chromium.org>
71 lines
1.6 KiB
C
71 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) Freescale Semiconductor, Inc. 2007
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*
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* Author: Scott Wood <scottwood@freescale.com>,
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* with some bits from older board-specific PCI initialization.
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*/
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#include <common.h>
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#include <init.h>
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#include <pci.h>
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#include <asm/bitops.h>
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#include <asm/global_data.h>
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#include <linux/delay.h>
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#if defined(CONFIG_OF_LIBFDT)
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#include <linux/libfdt.h>
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#include <fdt_support.h>
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#endif
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#include <asm/mpc8349_pci.h>
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#define MAX_BUSES 2
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DECLARE_GLOBAL_DATA_PTR;
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static struct pci_controller pci_hose[MAX_BUSES];
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static int pci_num_buses;
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#if defined(CONFIG_OF_LIBFDT)
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void ft_pci_setup(void *blob, struct bd_info *bd)
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{
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int nodeoffset;
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int tmp[2];
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const char *path;
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if (pci_num_buses < 1)
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return;
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nodeoffset = fdt_path_offset(blob, "/aliases");
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if (nodeoffset >= 0) {
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path = fdt_getprop(blob, nodeoffset, "pci0", NULL);
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if (path) {
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tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
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tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
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do_fixup_by_path(blob, path, "bus-range",
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&tmp, sizeof(tmp), 1);
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tmp[0] = cpu_to_be32(gd->pci_clk);
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do_fixup_by_path(blob, path, "clock-frequency",
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&tmp, sizeof(tmp[0]), 1);
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}
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if (pci_num_buses < 2)
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return;
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path = fdt_getprop(blob, nodeoffset, "pci1", NULL);
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if (path) {
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tmp[0] = cpu_to_be32(pci_hose[1].first_busno);
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tmp[1] = cpu_to_be32(pci_hose[1].last_busno);
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do_fixup_by_path(blob, path, "bus-range",
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&tmp, sizeof(tmp), 1);
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tmp[0] = cpu_to_be32(gd->pci_clk);
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do_fixup_by_path(blob, path, "clock-frequency",
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&tmp, sizeof(tmp[0]), 1);
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}
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}
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}
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#endif /* CONFIG_OF_LIBFDT */
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