mirror of
https://github.com/smaeul/u-boot.git
synced 2025-10-31 03:58:17 +00:00
f50af7ebd7
Current documentation limits the firmware size to 1.5MB. When the fTPM and StandaloneMM-based RPMB secure storage is enabled, firmware size is bigger than that size. Let's specify the A/B update bank size(4MB) for flash rawwrite parameter. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Acked-by: Jassi Brar <jaswinder.singh@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
231 lines
7.4 KiB
ReStructuredText
231 lines
7.4 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+
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Introduction
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============
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DeveloperBox is a certified 96boards Enterprise Edition board. The board/SoC has: -
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* Socionext SC2A11 24-cores ARM Cortex-A53 on tbe Mini-ATX form factor motherboard
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* 4 DIMM slots (4GB DDR4-2400 UDIMM shipped by default)
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* 1 4xPCIe Gen2 slot and 2 1xPCIe Gen2 slots
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(1x slots are connected via PCIe bridge chip)
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* 4 USB-3.0 ports
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* 2 SATA ports
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* 1 GbE network port
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* 1 USB-UART serial port (micro USB)
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* 64MB SPI NOR Flash
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* 8GB eMMC Flash Storage
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* 96boards LS connector
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The DeveloperBox schematic can be found here: -
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https://www.96boards.org/documentation/enterprise/developerbox/hardware-docs/mzsc2am_v03_20180115_a.pdf
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And the other documents can be found here: -
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https://www.96boards.org/documentation/enterprise/developerbox/
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Currently, the U-Boot port supports: -
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* USB
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* eMMC
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* SPI-NOR
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* SATA
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* GbE
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The DeveloperBox boots the TF-A and EDK2 as a main bootloader by default.
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The DeveloperBox U-Boot port will replace the EDK2 and boot from TF-A as
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BL33, but no need to combine with it.
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Compile from source
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===================
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You can build U-Boot without any additinal source code.::
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cd u-boot
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git checkout v2023.07
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export ARCH=arm64
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export CROSS_COMPILE=aarch64-linux-gnu-
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make synquacer_developerbox_defconfig
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make -j `noproc`
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Then, expand the binary to 1MB for preparing flash.::
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cp u-boot.bin SPI_NOR_UBOOT.fd
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truncate -s 1M SPI_NOR_UBOOT.fd
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Installation
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============
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You can install the SNI_NOR_UBOOT.fd via NOR flash writer.
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Flashing the U-Boot image on DeveloperBox requires a 96boards UART mezzanine
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or other mezzanine which can connect to the LS-UART0 port.
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Connect USB cable from host to the LS-UART0 and set DSW2-7 to ON, and turn the
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board on again. The flash writer program will be started automatically;
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don't forget to turn the DSW2-7 off again after flashing.
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*!!CAUTION!! If you write the U-Boot image on wrong address, the board can
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be bricked. See below page if you need to recover the bricked board. See
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the following page for more details*
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https://www.96boards.org/documentation/enterprise/developerbox/installation/board-recovery.md.html
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When the serial flasher is running correctly it will show the following boot
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messages printed to the LS-UART0 console::
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/*------------------------------------------*/
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/* SC2A11 "SynQuacer" series Flash writer */
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/* */
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/* Version: cd254ac */
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/* Build: 12/15/17 11:25:45 */
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/*------------------------------------------*/
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Command Input >
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Once the flasher tool is running we are ready flash the UEFI image::
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flash rawwrite 200000 100000
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>> Send SPI_NOR_UBOOT.fd via XMODEM (Control-A S in minicom) <<
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*!!NOTE!! The flasher command parameter is different from the command for
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board recovery. U-Boot uses the offset 200000 (2-five-0, 2M in hex) and the
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size 100000 (1-five-0, 1M in hex).*
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After transferring the SPI_NOR_UBOOT.fd, turn off the DSW2-7 and
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reset the board.
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Enable FWU Multi Bank Update
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============================
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DeveloperBox supports the FWU Multi Bank Update. You *MUST* update both
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*SCP firmware* and *TF-A* for this feature. This will change the layout and
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the boot process but you can switch back to the normal one by changing
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the DSW 1-4 off.
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Configure U-Boot
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----------------
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To enable the FWU Multi Bank Update on the DeveloperBox board the
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configs/synquacer_developerbox_defconfig enables default FWU configuration ::
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CONFIG_FWU_MULTI_BANK_UPDATE=y
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CONFIG_FWU_MDATA=y
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CONFIG_FWU_MDATA_MTD=y
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CONFIG_FWU_NUM_BANKS=2
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CONFIG_FWU_NUM_IMAGES_PER_BANK=1
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CONFIG_CMD_FWU_METADATA=y
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And build it::
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cd u-boot/
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export ARCH=arm64
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export CROSS_COMPILE=aarch64-linux-gnu-
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make synquacer_developerbox_defconfig
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make -j `noproc`
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cd ../
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By default, the CONFIG_FWU_NUM_BANKS and CONFIG_FWU_NUM_IMAGES_PER_BANKS are
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set to 2 and 1 respectively. This uses FIP (Firmware Image Package) type image
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which contains TF-A, U-Boot and OP-TEE (the OP-TEE is optional).
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You can use fiptool to compose the FIP image from those firmware images.
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Rebuild SCP firmware
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--------------------
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Rebuild SCP firmware which supports FWU Multi Bank Update as below::
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cd SCP-firmware/
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OUT=./build/product/synquacer
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ROMFW_FILE=$OUT/scp_romfw/$SCP_BUILD_MODE/bin/scp_romfw.bin
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RAMFW_FILE=$OUT/scp_ramfw/$SCP_BUILD_MODE/bin/scp_ramfw.bin
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ROMRAMFW_FILE=scp_romramfw_release.bin
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make CC=arm-none-eabi-gcc PRODUCT=synquacer MODE=release
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tr "\000" "\377" < /dev/zero | dd of=${ROMRAMFW_FILE} bs=1 count=196608
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dd if=${ROMFW_FILE} of=${ROMRAMFW_FILE} bs=1 conv=notrunc seek=0
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dd if=${RAMFW_FILE} of=${ROMRAMFW_FILE} bs=1 seek=65536
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cd ../
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And you can get the `scp_romramfw_release.bin` file.
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Rebuild OPTEE firmware
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----------------------
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Rebuild OPTEE to use in new-layout FIP as below::
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cd optee_os/
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make -j`nproc` PLATFORM=synquacer ARCH=arm \
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CROSS_COMPILE64=aarch64-linux-gnu- CFG_ARM64_core=y \
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CFG_CRYPTO_WITH_CE=y CFG_CORE_HEAP_SIZE=524288 CFG_CORE_DYN_SHM=y \
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CFG_CORE_ARM64_PA_BITS=48 CFG_TEE_CORE_LOG_LEVEL=1 CFG_TEE_TA_LOG_LEVEL=1
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cp out/arm-plat-synquacer/core/tee-pager_v2.bin ../arm-trusted-firmware/
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The produced `tee-pager_v2.bin` is to be used while building TF-A next.
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Rebuild TF-A and FIP
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--------------------
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Rebuild TF-A which supports FWU Multi Bank Update as below::
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cd arm-trusted-firmware/
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make CROSS_COMPILE=aarch64-linux-gnu- -j`nproc` PLAT=synquacer \
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TRUSTED_BOARD_BOOT=1 SPD=opteed SQ_RESET_TO_BL2=1 GENERATE_COT=1 \
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MBEDTLS_DIR=../mbedtls BL32=tee-pager_v2.bin \
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BL33=../u-boot/u-boot.bin all fip fiptool
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And make a FIP image.::
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cp build/synquacer/release/fip.bin SPI_NOR_NEWFIP.fd
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tools/fiptool/fiptool update --tb-fw build/synquacer/release/bl2.bin SPI_NOR_NEWFIP.fd
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UUIDs for the FWU Multi Bank Update
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-----------------------------------
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FWU multi-bank update requires some UUIDs. The DeveloperBox platform uses
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following UUIDs.
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- Location UUID for the FIP image: 17e86d77-41f9-4fd7-87ec-a55df9842de5
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- Image type UUID for the FIP image: 10c36d7d-ca52-b843-b7b9-f9d6c501d108
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- Image UUID for Bank0 : 5a66a702-99fd-4fef-a392-c26e261a2828
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- Image UUID for Bank1 : a8f868a1-6e5c-4757-878d-ce63375ef2c0
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These UUIDs are used for making a FWU metadata image.
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u-boot$ ./tools/mkfwumdata -i 1 -b 2 \
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17e86d77-41f9-4fd7-87ec-a55df9842de5,10c36d7d-ca52-b843-b7b9-f9d6c501d108,5a66a702-99fd-4fef-a392-c26e261a2828,a8f868a1-6e5c-4757-878d-ce63375ef2c0 \
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../devbox-fwu-mdata.img
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Create Accept & Revert capsules
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u-boot$ ./tools/mkeficapsule -A -g 7d6dc310-52ca-43b8-b7b9-f9d6c501d108 NEWFIP_accept.Cap
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u-boot$ ./tools/mkeficapsule -R NEWFIP_revert.Cap
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Install via flash writer
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------------------------
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As explained in above section, the new FIP image and the FWU metadata image
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can be installed via NOR flash writer.
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Once the flasher tool is running we are ready to flash the images.::
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Write the FIP image to the Bank-0 & 1 at 6MB and 10MB offset.::
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flash rawwrite 600000 400000
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flash rawwrite a00000 400000
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>> Send SPI_NOR_NEWFIP.fd via XMODEM (Control-A S in minicom) <<
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flash rawwrite 500000 1000
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flash rawwrite 530000 1000
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>> Send devbox-fwu-mdata.img via XMODEM (Control-A S in minicom) <<
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And write the new SCP firmware.::
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flash write cm3
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>> Send scp_romramfw_release.bin via XMODEM (Control-A S in minicom) <<
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At last, turn on the DSW 3-4 on the board, and reboot.
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Note that if DSW 3-4 is turned off, the DeveloperBox will boot from
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the original EDK2 firmware (or non-FWU U-Boot if you already installed).
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