mirror of
https://github.com/easytarget/MQ-Pro-IO.git
synced 2025-10-13 17:25:52 +01:00
latest; still wip
This commit is contained in:
Owen
parent
aaa316231f
commit
856624b1e7
1
.gitignore
vendored
1
.gitignore
vendored
@ -1,5 +1,6 @@
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# specific to this repo
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device-tree/dtspp/*.dts*
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source/*
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# Byte-compiled / optimized / DLL files
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__pycache__/
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32
device-tree/6.8.0-41-generic/sun20i-common-regulators.dtsi
Normal file
32
device-tree/6.8.0-41-generic/sun20i-common-regulators.dtsi
Normal file
@ -0,0 +1,32 @@
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# 0 "sun20i-common-regulators.dtsi"
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# 0 "<built-in>"
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# 0 "<command-line>"
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# 1 "sun20i-common-regulators.dtsi"
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/ {
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reg_vcc: vcc {
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compatible = "regulator-fixed";
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regulator-name = "vcc";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_vcc_3v3: vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <®_vcc>;
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};
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};
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&pio {
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vcc-pb-supply = <®_vcc_3v3>;
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vcc-pc-supply = <®_vcc_3v3>;
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vcc-pd-supply = <®_vcc_3v3>;
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vcc-pe-supply = <®_vcc_3v3>;
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vcc-pf-supply = <®_vcc_3v3>;
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vcc-pg-supply = <®_vcc_3v3>;
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};
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BIN
device-tree/6.8.0-41-generic/sun20i-d1-mangopi-mq-pro.dtb
Normal file
BIN
device-tree/6.8.0-41-generic/sun20i-d1-mangopi-mq-pro.dtb
Normal file
Binary file not shown.
1583
device-tree/6.8.0-41-generic/sun20i-d1-mangopi-mq-pro.dts
Normal file
1583
device-tree/6.8.0-41-generic/sun20i-d1-mangopi-mq-pro.dts
Normal file
File diff suppressed because it is too large
Load Diff
1380
device-tree/6.8.0-41-generic/sun20i-d1.dtsi
Normal file
1380
device-tree/6.8.0-41-generic/sun20i-d1.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
1119
device-tree/6.8.0-41-generic/sun20i-d1s.dtsi
Normal file
1119
device-tree/6.8.0-41-generic/sun20i-d1s.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
69
device-tree/6.8.0-41-generic/sunxi-d1-t113.dtsi
Normal file
69
device-tree/6.8.0-41-generic/sunxi-d1-t113.dtsi
Normal file
@ -0,0 +1,69 @@
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# 0 "sunxi-d1-t113.dtsi"
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# 0 "<built-in>"
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# 0 "<command-line>"
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# 1 "sunxi-d1-t113.dtsi"
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/ {
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soc {
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dsp_wdt: watchdog@1700400 {
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compatible = "allwinner,sun20i-d1-wdt";
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reg = <0x1700400 0x20>;
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interrupts = <SOC_PERIPHERAL_IRQ(122) IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&dcxo>, <&rtc CLK_OSC32K>;
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clock-names = "hosc", "losc";
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status = "reserved";
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};
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hdmi: hdmi@5500000 {
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compatible = "allwinner,sun20i-d1-dw-hdmi";
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reg = <0x5500000 0x10000>;
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reg-io-width = <1>;
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interrupts = <SOC_PERIPHERAL_IRQ(93) IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_HDMI>,
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<&ccu CLK_HDMI_24M>,
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<&ccu CLK_HDMI_CEC>;
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clock-names = "iahb", "isfr", "cec";
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resets = <&ccu RST_BUS_HDMI_SUB>;
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reset-names = "ctrl";
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phys = <&hdmi_phy>;
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phy-names = "phy";
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi_in_tcon_top: endpoint {
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remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
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};
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};
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hdmi_out: port@1 {
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reg = <1>;
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};
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};
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};
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hdmi_phy: phy@5510000 {
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compatible = "allwinner,sun20i-d1-hdmi-phy";
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reg = <0x5510000 0x10000>;
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clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_24M>;
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clock-names = "bus", "mod";
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resets = <&ccu RST_BUS_HDMI_MAIN>;
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reset-names = "phy";
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status = "disabled";
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#phy-cells = <0>;
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};
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};
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};
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&tcon_top_hdmi_out {
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tcon_top_hdmi_out_hdmi: endpoint {
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remote-endpoint = <&hdmi_in_tcon_top>;
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};
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||||
};
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990
device-tree/6.8.0-41-generic/sunxi-d1s-t113.dtsi
Normal file
990
device-tree/6.8.0-41-generic/sunxi-d1s-t113.dtsi
Normal file
@ -0,0 +1,990 @@
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# 0 "sunxi-d1s-t113.dtsi"
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||||
# 0 "<built-in>"
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||||
# 0 "<command-line>"
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||||
# 1 "sunxi-d1s-t113.dtsi"
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# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun6i-rtc.h" 1
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# 5 "sunxi-d1s-t113.dtsi" 2
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# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun8i-de2.h" 1
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# 6 "sunxi-d1s-t113.dtsi" 2
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# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun8i-tcon-top.h" 1
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# 7 "sunxi-d1s-t113.dtsi" 2
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# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun20i-d1-ccu.h" 1
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# 8 "sunxi-d1s-t113.dtsi" 2
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# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun20i-d1-r-ccu.h" 1
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# 9 "sunxi-d1s-t113.dtsi" 2
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# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/interrupt-controller/irq.h" 1
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# 10 "sunxi-d1s-t113.dtsi" 2
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# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun8i-de2.h" 1
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# 11 "sunxi-d1s-t113.dtsi" 2
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# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun20i-d1-ccu.h" 1
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# 12 "sunxi-d1s-t113.dtsi" 2
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# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun20i-d1-r-ccu.h" 1
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# 13 "sunxi-d1s-t113.dtsi" 2
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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dcxo: dcxo-clk {
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compatible = "fixed-clock";
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clock-output-names = "dcxo";
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#clock-cells = <0>;
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};
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de: display-engine {
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compatible = "allwinner,sun20i-d1-display-engine";
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allwinner,pipelines = <&mixer0>, <&mixer1>;
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status = "disabled";
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};
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soc {
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compatible = "simple-bus";
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ranges;
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dma-noncoherent;
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#address-cells = <1>;
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#size-cells = <1>;
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pio: pinctrl@2000000 {
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compatible = "allwinner,sun20i-d1-pinctrl";
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reg = <0x2000000 0x800>;
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interrupts = <SOC_PERIPHERAL_IRQ(69) 4>,
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<SOC_PERIPHERAL_IRQ(71) 4>,
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<SOC_PERIPHERAL_IRQ(73) 4>,
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<SOC_PERIPHERAL_IRQ(75) 4>,
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<SOC_PERIPHERAL_IRQ(77) 4>,
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<SOC_PERIPHERAL_IRQ(79) 4>;
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clocks = <&ccu 24>,
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<&dcxo>,
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<&rtc 0>;
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clock-names = "apb", "hosc", "losc";
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gpio-controller;
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interrupt-controller;
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#gpio-cells = <3>;
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#interrupt-cells = <3>;
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/omit-if-no-ref/
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can0_pins: can0-pins {
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pins = "PB2", "PB3";
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function = "can0";
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};
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/omit-if-no-ref/
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can1_pins: can1-pins {
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pins = "PB4", "PB5";
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function = "can1";
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};
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/omit-if-no-ref/
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clk_pg11_pin: clk-pg11-pin {
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pins = "PG11";
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function = "clk";
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};
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/omit-if-no-ref/
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dsi_4lane_pins: dsi-4lane-pins {
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pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
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"PD6", "PD7", "PD8", "PD9";
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||||
drive-strength = <30>;
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||||
function = "dsi";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
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lcd_rgb666_pins: lcd-rgb666-pins {
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pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
|
||||
"PD6", "PD7", "PD8", "PD9", "PD10", "PD11",
|
||||
"PD12", "PD13", "PD14", "PD15", "PD16", "PD17",
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||||
"PD18", "PD19", "PD20", "PD21";
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||||
function = "lcd0";
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||||
};
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||||
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||||
/omit-if-no-ref/
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||||
mmc0_pins: mmc0-pins {
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||||
pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
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||||
function = "mmc0";
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||||
};
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||||
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||||
/omit-if-no-ref/
|
||||
mmc1_pins: mmc1-pins {
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||||
pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
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||||
function = "mmc1";
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||||
};
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||||
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||||
/omit-if-no-ref/
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||||
mmc2_pins: mmc2-pins {
|
||||
pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7";
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||||
function = "mmc2";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
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||||
pwm0_pd16_pin: pwm0-pd16-pin {
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pins = "PD16";
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||||
function = "pwm0";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
pwm2_pd18_pin: pwm2-pd18-pin {
|
||||
pins = "PD18";
|
||||
function = "pwm2";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
pwm4_pd20_pin: pwm4-pd20-pin {
|
||||
pins = "PD20";
|
||||
function = "pwm4";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
pwm7_pd22_pin: pwm7-pd22-pin {
|
||||
pins = "PD22";
|
||||
function = "pwm7";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
rgmii_pe_pins: rgmii-pe-pins {
|
||||
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
|
||||
"PE5", "PE6", "PE7", "PE8", "PE9",
|
||||
"PE11", "PE12", "PE13", "PE14", "PE15";
|
||||
function = "emac";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
rmii_pe_pins: rmii-pe-pins {
|
||||
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
|
||||
"PE5", "PE6", "PE7", "PE8", "PE9";
|
||||
function = "emac";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
spi0_pins: spi0-pins {
|
||||
pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7";
|
||||
function = "spi0";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
spi1_pb_pins: spi1-pb-pins {
|
||||
pins = "PB0", "PB8", "PB9", "PB10", "PB11", "PB12";
|
||||
function = "spi1";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
spi1_pd_pins: spi1-pd-pins {
|
||||
pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15";
|
||||
function = "spi1";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart1_pg6_pins: uart1-pg6-pins {
|
||||
pins = "PG6", "PG7";
|
||||
function = "uart1";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart1_pg8_rts_cts_pins: uart1-pg8-rts-cts-pins {
|
||||
pins = "PG8", "PG9";
|
||||
function = "uart1";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart3_pb_pins: uart3-pb-pins {
|
||||
pins = "PB6", "PB7";
|
||||
function = "uart3";
|
||||
};
|
||||
};
|
||||
|
||||
pwm: pwm@2000c00 {
|
||||
compatible = "allwinner,sun20i-d1-pwm";
|
||||
reg = <0x02000c00 0x400>;
|
||||
clocks = <&ccu 45>,
|
||||
<&dcxo>,
|
||||
<&ccu 24>;
|
||||
clock-names = "bus", "hosc", "apb0";
|
||||
resets = <&ccu 13>;
|
||||
status = "disabled";
|
||||
#pwm-cells = <0x3>;
|
||||
};
|
||||
|
||||
ccu: clock-controller@2001000 {
|
||||
compatible = "allwinner,sun20i-d1-ccu";
|
||||
reg = <0x2001000 0x1000>;
|
||||
clocks = <&dcxo>,
|
||||
<&rtc 0>,
|
||||
<&rtc 2>;
|
||||
clock-names = "hosc", "losc", "iosc";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
gpadc: adc@2009000 {
|
||||
compatible = "allwinner,sun20i-d1-gpadc";
|
||||
reg = <0x2009000 0x400>;
|
||||
clocks = <&ccu 80>;
|
||||
resets = <&ccu 32>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(57) 4>;
|
||||
status = "disabled";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
|
||||
dmic: dmic@2031000 {
|
||||
compatible = "allwinner,sun20i-d1-dmic",
|
||||
"allwinner,sun50i-h6-dmic";
|
||||
reg = <0x2031000 0x400>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(24) 4>;
|
||||
clocks = <&ccu 93>,
|
||||
<&ccu 92>;
|
||||
clock-names = "bus", "mod";
|
||||
resets = <&ccu 38>;
|
||||
dmas = <&dma 8>;
|
||||
dma-names = "rx";
|
||||
status = "disabled";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
i2s1: i2s@2033000 {
|
||||
compatible = "allwinner,sun20i-d1-i2s",
|
||||
"allwinner,sun50i-r329-i2s";
|
||||
reg = <0x2033000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(27) 4>;
|
||||
clocks = <&ccu 87>,
|
||||
<&ccu 83>;
|
||||
clock-names = "apb", "mod";
|
||||
resets = <&ccu 35>;
|
||||
dmas = <&dma 4>, <&dma 4>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
i2s2: i2s@2034000 {
|
||||
compatible = "allwinner,sun20i-d1-i2s",
|
||||
"allwinner,sun50i-r329-i2s";
|
||||
reg = <0x2034000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(28) 4>;
|
||||
clocks = <&ccu 88>,
|
||||
<&ccu 84>;
|
||||
clock-names = "apb", "mod";
|
||||
resets = <&ccu 36>;
|
||||
dmas = <&dma 5>, <&dma 5>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
timer: timer@2050000 {
|
||||
compatible = "allwinner,sun20i-d1-timer",
|
||||
"allwinner,sun8i-a23-timer";
|
||||
reg = <0x2050000 0xa0>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(59) 4>,
|
||||
<SOC_PERIPHERAL_IRQ(60) 4>;
|
||||
clocks = <&dcxo>;
|
||||
};
|
||||
|
||||
wdt: watchdog@20500a0 {
|
||||
compatible = "allwinner,sun20i-d1-wdt-reset",
|
||||
"allwinner,sun20i-d1-wdt";
|
||||
reg = <0x20500a0 0x20>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(63) 4>;
|
||||
clocks = <&dcxo>, <&rtc 0>;
|
||||
clock-names = "hosc", "losc";
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
uart0: serial@2500000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x2500000 0x400>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(2) 4>;
|
||||
clocks = <&ccu 62>;
|
||||
resets = <&ccu 18>;
|
||||
dmas = <&dma 14>, <&dma 14>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@2500400 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x2500400 0x400>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(3) 4>;
|
||||
clocks = <&ccu 63>;
|
||||
resets = <&ccu 19>;
|
||||
dmas = <&dma 15>, <&dma 15>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@2500800 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x2500800 0x400>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(4) 4>;
|
||||
clocks = <&ccu 64>;
|
||||
resets = <&ccu 20>;
|
||||
dmas = <&dma 16>, <&dma 16>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: serial@2500c00 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x2500c00 0x400>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(5) 4>;
|
||||
clocks = <&ccu 65>;
|
||||
resets = <&ccu 21>;
|
||||
dmas = <&dma 17>, <&dma 17>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart4: serial@2501000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x2501000 0x400>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(6) 4>;
|
||||
clocks = <&ccu 66>;
|
||||
resets = <&ccu 22>;
|
||||
dmas = <&dma 18>, <&dma 18>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart5: serial@2501400 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x2501400 0x400>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(7) 4>;
|
||||
clocks = <&ccu 67>;
|
||||
resets = <&ccu 23>;
|
||||
dmas = <&dma 19>, <&dma 19>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@2502000 {
|
||||
compatible = "allwinner,sun20i-d1-i2c",
|
||||
"allwinner,sun8i-v536-i2c",
|
||||
"allwinner,sun6i-a31-i2c";
|
||||
reg = <0x2502000 0x400>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(9) 4>;
|
||||
clocks = <&ccu 68>;
|
||||
resets = <&ccu 24>;
|
||||
dmas = <&dma 43>, <&dma 43>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
i2c1: i2c@2502400 {
|
||||
compatible = "allwinner,sun20i-d1-i2c",
|
||||
"allwinner,sun8i-v536-i2c",
|
||||
"allwinner,sun6i-a31-i2c";
|
||||
reg = <0x2502400 0x400>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(10) 4>;
|
||||
clocks = <&ccu 69>;
|
||||
resets = <&ccu 25>;
|
||||
dmas = <&dma 44>, <&dma 44>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
i2c2: i2c@2502800 {
|
||||
compatible = "allwinner,sun20i-d1-i2c",
|
||||
"allwinner,sun8i-v536-i2c",
|
||||
"allwinner,sun6i-a31-i2c";
|
||||
reg = <0x2502800 0x400>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(11) 4>;
|
||||
clocks = <&ccu 70>;
|
||||
resets = <&ccu 26>;
|
||||
dmas = <&dma 45>, <&dma 45>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
i2c3: i2c@2502c00 {
|
||||
compatible = "allwinner,sun20i-d1-i2c",
|
||||
"allwinner,sun8i-v536-i2c",
|
||||
"allwinner,sun6i-a31-i2c";
|
||||
reg = <0x2502c00 0x400>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(12) 4>;
|
||||
clocks = <&ccu 71>;
|
||||
resets = <&ccu 27>;
|
||||
dmas = <&dma 46>, <&dma 46>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
can0: can@2504000 {
|
||||
compatible = "allwinner,sun20i-d1-can";
|
||||
reg = <0x02504000 0x400>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(21) 4>;
|
||||
clocks = <&ccu 145>;
|
||||
resets = <&ccu 66>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can0_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can1: can@2504400 {
|
||||
compatible = "allwinner,sun20i-d1-can";
|
||||
reg = <0x02504400 0x400>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(22) 4>;
|
||||
clocks = <&ccu 146>;
|
||||
resets = <&ccu 67>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can1_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
syscon: syscon@3000000 {
|
||||
compatible = "allwinner,sun20i-d1-system-control";
|
||||
reg = <0x3000000 0x1000>;
|
||||
ranges;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
dma: dma-controller@3002000 {
|
||||
compatible = "allwinner,sun20i-d1-dma";
|
||||
reg = <0x3002000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(50) 4>;
|
||||
clocks = <&ccu 37>, <&ccu 48>;
|
||||
clock-names = "bus", "mbus";
|
||||
resets = <&ccu 6>;
|
||||
dma-channels = <16>;
|
||||
dma-requests = <48>;
|
||||
#dma-cells = <1>;
|
||||
};
|
||||
|
||||
sid: efuse@3006000 {
|
||||
compatible = "allwinner,sun20i-d1-sid";
|
||||
reg = <0x3006000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
crypto: crypto@3040000 {
|
||||
compatible = "allwinner,sun20i-d1-crypto";
|
||||
reg = <0x3040000 0x800>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(52) 4>;
|
||||
clocks = <&ccu 34>,
|
||||
<&ccu 33>,
|
||||
<&ccu 50>,
|
||||
<&rtc 2>;
|
||||
clock-names = "bus", "mod", "ram", "trng";
|
||||
resets = <&ccu 4>;
|
||||
};
|
||||
|
||||
mbus: dram-controller@3102000 {
|
||||
compatible = "allwinner,sun20i-d1-mbus";
|
||||
reg = <0x3102000 0x1000>,
|
||||
<0x3103000 0x1000>;
|
||||
reg-names = "mbus", "dram";
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(43) 4>;
|
||||
clocks = <&ccu 26>,
|
||||
<&ccu 47>,
|
||||
<&ccu 55>;
|
||||
clock-names = "mbus", "dram", "bus";
|
||||
dma-ranges = <0 0x40000000 0x80000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#interconnect-cells = <1>;
|
||||
};
|
||||
|
||||
mmc0: mmc@4020000 {
|
||||
compatible = "allwinner,sun20i-d1-mmc";
|
||||
reg = <0x4020000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(40) 4>;
|
||||
clocks = <&ccu 59>, <&ccu 56>;
|
||||
clock-names = "ahb", "mmc";
|
||||
resets = <&ccu 15>;
|
||||
reset-names = "ahb";
|
||||
cap-sd-highspeed;
|
||||
max-frequency = <150000000>;
|
||||
no-mmc;
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
mmc1: mmc@4021000 {
|
||||
compatible = "allwinner,sun20i-d1-mmc";
|
||||
reg = <0x4021000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(41) 4>;
|
||||
clocks = <&ccu 60>, <&ccu 57>;
|
||||
clock-names = "ahb", "mmc";
|
||||
resets = <&ccu 16>;
|
||||
reset-names = "ahb";
|
||||
cap-sd-highspeed;
|
||||
max-frequency = <150000000>;
|
||||
no-mmc;
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
mmc2: mmc@4022000 {
|
||||
compatible = "allwinner,sun20i-d1-emmc",
|
||||
"allwinner,sun50i-a100-emmc";
|
||||
reg = <0x4022000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(42) 4>;
|
||||
clocks = <&ccu 61>, <&ccu 58>;
|
||||
clock-names = "ahb", "mmc";
|
||||
resets = <&ccu 17>;
|
||||
reset-names = "ahb";
|
||||
cap-mmc-highspeed;
|
||||
max-frequency = <150000000>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-ddr-3_3v;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
spi0: spi@4025000 {
|
||||
compatible = "allwinner,sun20i-d1-spi",
|
||||
"allwinner,sun50i-r329-spi";
|
||||
reg = <0x04025000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(15) 4>;
|
||||
clocks = <&ccu 74>, <&ccu 72>;
|
||||
clock-names = "ahb", "mod";
|
||||
dmas = <&dma 22>, <&dma 22>;
|
||||
dma-names = "rx", "tx";
|
||||
resets = <&ccu 28>;
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
spi1: spi@4026000 {
|
||||
compatible = "allwinner,sun20i-d1-spi-dbi",
|
||||
"allwinner,sun50i-r329-spi-dbi",
|
||||
"allwinner,sun50i-r329-spi";
|
||||
reg = <0x04026000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(16) 4>;
|
||||
clocks = <&ccu 75>, <&ccu 73>;
|
||||
clock-names = "ahb", "mod";
|
||||
dmas = <&dma 23>, <&dma 23>;
|
||||
dma-names = "rx", "tx";
|
||||
resets = <&ccu 29>;
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
usb_otg: usb@4100000 {
|
||||
compatible = "allwinner,sun20i-d1-musb",
|
||||
"allwinner,sun8i-a33-musb";
|
||||
reg = <0x4100000 0x400>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(29) 4>;
|
||||
interrupt-names = "mc";
|
||||
clocks = <&ccu 103>;
|
||||
resets = <&ccu 46>;
|
||||
extcon = <&usbphy 0>;
|
||||
phys = <&usbphy 0>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: phy@4100400 {
|
||||
compatible = "allwinner,sun20i-d1-usb-phy";
|
||||
reg = <0x4100400 0x100>,
|
||||
<0x4101800 0x100>,
|
||||
<0x4200800 0x100>;
|
||||
reg-names = "phy_ctrl",
|
||||
"pmu0",
|
||||
"pmu1";
|
||||
clocks = <&dcxo>,
|
||||
<&dcxo>;
|
||||
clock-names = "usb0_phy",
|
||||
"usb1_phy";
|
||||
resets = <&ccu 40>,
|
||||
<&ccu 41>;
|
||||
reset-names = "usb0_reset",
|
||||
"usb1_reset";
|
||||
status = "disabled";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
ehci0: usb@4101000 {
|
||||
compatible = "allwinner,sun20i-d1-ehci",
|
||||
"generic-ehci";
|
||||
reg = <0x4101000 0x100>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(30) 4>;
|
||||
clocks = <&ccu 99>,
|
||||
<&ccu 101>,
|
||||
<&ccu 97>;
|
||||
resets = <&ccu 42>,
|
||||
<&ccu 44>;
|
||||
phys = <&usbphy 0>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ohci0: usb@4101400 {
|
||||
compatible = "allwinner,sun20i-d1-ohci",
|
||||
"generic-ohci";
|
||||
reg = <0x4101400 0x100>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(31) 4>;
|
||||
clocks = <&ccu 99>,
|
||||
<&ccu 97>;
|
||||
resets = <&ccu 42>;
|
||||
phys = <&usbphy 0>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehci1: usb@4200000 {
|
||||
compatible = "allwinner,sun20i-d1-ehci",
|
||||
"generic-ehci";
|
||||
reg = <0x4200000 0x100>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(33) 4>;
|
||||
clocks = <&ccu 100>,
|
||||
<&ccu 102>,
|
||||
<&ccu 98>;
|
||||
resets = <&ccu 43>,
|
||||
<&ccu 45>;
|
||||
phys = <&usbphy 1>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ohci1: usb@4200400 {
|
||||
compatible = "allwinner,sun20i-d1-ohci",
|
||||
"generic-ohci";
|
||||
reg = <0x4200400 0x100>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(34) 4>;
|
||||
clocks = <&ccu 100>,
|
||||
<&ccu 98>;
|
||||
resets = <&ccu 43>;
|
||||
phys = <&usbphy 1>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
emac: ethernet@4500000 {
|
||||
compatible = "allwinner,sun20i-d1-emac",
|
||||
"allwinner,sun50i-a64-emac";
|
||||
reg = <0x4500000 0x10000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(46) 4>;
|
||||
interrupt-names = "macirq";
|
||||
clocks = <&ccu 77>;
|
||||
clock-names = "stmmaceth";
|
||||
resets = <&ccu 30>;
|
||||
reset-names = "stmmaceth";
|
||||
syscon = <&syscon>;
|
||||
status = "disabled";
|
||||
|
||||
mdio: mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
display_clocks: clock-controller@5000000 {
|
||||
compatible = "allwinner,sun20i-d1-de2-clk",
|
||||
"allwinner,sun50i-h5-de2-clk";
|
||||
reg = <0x5000000 0x10000>;
|
||||
clocks = <&ccu 28>, <&ccu 27>;
|
||||
clock-names = "bus", "mod";
|
||||
resets = <&ccu 1>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
mixer0: mixer@5100000 {
|
||||
compatible = "allwinner,sun20i-d1-de2-mixer-0";
|
||||
reg = <0x5100000 0x100000>;
|
||||
clocks = <&display_clocks 0>,
|
||||
<&display_clocks 6>;
|
||||
clock-names = "bus", "mod";
|
||||
resets = <&display_clocks 0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mixer0_out: port@1 {
|
||||
reg = <1>;
|
||||
|
||||
mixer0_out_tcon_top_mixer0: endpoint {
|
||||
remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mixer1: mixer@5200000 {
|
||||
compatible = "allwinner,sun20i-d1-de2-mixer-1";
|
||||
reg = <0x5200000 0x100000>;
|
||||
clocks = <&display_clocks 1>,
|
||||
<&display_clocks 7>;
|
||||
clock-names = "bus", "mod";
|
||||
resets = <&display_clocks 1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mixer1_out: port@1 {
|
||||
reg = <1>;
|
||||
|
||||
mixer1_out_tcon_top_mixer1: endpoint {
|
||||
remote-endpoint = <&tcon_top_mixer1_in_mixer1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dsi: dsi@5450000 {
|
||||
compatible = "allwinner,sun20i-d1-mipi-dsi",
|
||||
"allwinner,sun50i-a100-mipi-dsi";
|
||||
reg = <0x5450000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(92) 4>;
|
||||
clocks = <&ccu 111>,
|
||||
<&tcon_top 2>;
|
||||
clock-names = "bus", "mod";
|
||||
resets = <&ccu 51>;
|
||||
phys = <&dphy>;
|
||||
phy-names = "dphy";
|
||||
status = "disabled";
|
||||
|
||||
port {
|
||||
dsi_in_tcon_lcd0: endpoint {
|
||||
remote-endpoint = <&tcon_lcd0_out_dsi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dphy: phy@5451000 {
|
||||
compatible = "allwinner,sun20i-d1-mipi-dphy",
|
||||
"allwinner,sun50i-a100-mipi-dphy";
|
||||
reg = <0x5451000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(92) 4>;
|
||||
clocks = <&ccu 111>,
|
||||
<&ccu 110>;
|
||||
clock-names = "bus", "mod";
|
||||
resets = <&ccu 51>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
tcon_top: tcon-top@5460000 {
|
||||
compatible = "allwinner,sun20i-d1-tcon-top";
|
||||
reg = <0x5460000 0x1000>;
|
||||
clocks = <&ccu 105>,
|
||||
<&ccu 114>,
|
||||
<&ccu 116>,
|
||||
<&ccu 112>;
|
||||
clock-names = "bus", "tcon-tv0", "tve0", "dsi";
|
||||
clock-output-names = "tcon-top-tv0", "tcon-top-dsi";
|
||||
resets = <&ccu 48>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_top_mixer0_in: port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tcon_top_mixer0_in_mixer0: endpoint {
|
||||
remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_top_mixer0_out: port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_top_mixer0_out_tcon_lcd0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>;
|
||||
};
|
||||
|
||||
tcon_top_mixer0_out_tcon_tv0: endpoint@2 {
|
||||
reg = <2>;
|
||||
remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_top_mixer1_in: port@2 {
|
||||
reg = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_top_mixer1_in_mixer1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&mixer1_out_tcon_top_mixer1>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_top_mixer1_out: port@3 {
|
||||
reg = <3>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_top_mixer1_out_tcon_lcd0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer1>;
|
||||
};
|
||||
|
||||
tcon_top_mixer1_out_tcon_tv0: endpoint@2 {
|
||||
reg = <2>;
|
||||
remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_top_hdmi_in: port@4 {
|
||||
reg = <4>;
|
||||
|
||||
tcon_top_hdmi_in_tcon_tv0: endpoint {
|
||||
remote-endpoint = <&tcon_tv0_out_tcon_top_hdmi>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_top_hdmi_out: port@5 {
|
||||
reg = <5>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tcon_lcd0: lcd-controller@5461000 {
|
||||
compatible = "allwinner,sun20i-d1-tcon-lcd";
|
||||
reg = <0x5461000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(90) 4>;
|
||||
clocks = <&ccu 113>,
|
||||
<&ccu 112>;
|
||||
clock-names = "ahb", "tcon-ch0";
|
||||
clock-output-names = "tcon-pixel-clock";
|
||||
resets = <&ccu 52>,
|
||||
<&ccu 54>;
|
||||
reset-names = "lcd", "lvds";
|
||||
phys = <&dphy>;
|
||||
phy-names = "lvds0";
|
||||
#clock-cells = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_lcd0_in: port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_lcd0_in_tcon_top_mixer0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>;
|
||||
};
|
||||
|
||||
tcon_lcd0_in_tcon_top_mixer1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&tcon_top_mixer1_out_tcon_lcd0>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_lcd0_out: port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_lcd0_out_dsi: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&dsi_in_tcon_lcd0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tcon_tv0: lcd-controller@5470000 {
|
||||
compatible = "allwinner,sun20i-d1-tcon-tv";
|
||||
reg = <0x5470000 0x1000>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(91) 4>;
|
||||
clocks = <&ccu 115>,
|
||||
<&tcon_top 0>;
|
||||
clock-names = "ahb", "tcon-ch1";
|
||||
resets = <&ccu 53>;
|
||||
reset-names = "lcd";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_tv0_in: port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_tv0_in_tcon_top_mixer0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
|
||||
};
|
||||
|
||||
tcon_tv0_in_tcon_top_mixer1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_tv0_out: port@1 {
|
||||
reg = <1>;
|
||||
|
||||
tcon_tv0_out_tcon_top_hdmi: endpoint {
|
||||
remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ppu: power-controller@7001000 {
|
||||
compatible = "allwinner,sun20i-d1-ppu";
|
||||
reg = <0x7001000 0x1000>;
|
||||
clocks = <&r_ccu 4>;
|
||||
resets = <&r_ccu 2>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
r_ccu: clock-controller@7010000 {
|
||||
compatible = "allwinner,sun20i-d1-r-ccu";
|
||||
reg = <0x7010000 0x400>;
|
||||
clocks = <&dcxo>,
|
||||
<&rtc 0>,
|
||||
<&rtc 2>,
|
||||
<&ccu 6>;
|
||||
clock-names = "hosc", "losc", "iosc", "pll-periph";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
rtc: rtc@7090000 {
|
||||
compatible = "allwinner,sun20i-d1-rtc",
|
||||
"allwinner,sun50i-r329-rtc";
|
||||
reg = <0x7090000 0x400>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(144) 4>;
|
||||
clocks = <&r_ccu 7>,
|
||||
<&dcxo>,
|
||||
<&r_ccu 0>;
|
||||
clock-names = "bus", "hosc", "ahb";
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
1
device-tree/sun20i-common-regulators.dtsi
Symbolic link
1
device-tree/sun20i-common-regulators.dtsi
Symbolic link
@ -0,0 +1 @@
|
||||
../source/linux-riscv-6.8.0/arch/riscv/boot/dts/allwinner/sun20i-common-regulators.dtsi
|
||||
@ -1,64 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
/ {
|
||||
reg_vcc: vcc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc-3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <®_vcc>;
|
||||
};
|
||||
};
|
||||
|
||||
&codec {
|
||||
avcc-supply = <®_aldo>;
|
||||
hpvcc-supply = <®_hpldo>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
hvcc-supply = <®_ldoa>;
|
||||
};
|
||||
|
||||
&lradc {
|
||||
vref-supply = <®_aldo>;
|
||||
};
|
||||
|
||||
&pio {
|
||||
vcc-pb-supply = <®_vcc_3v3>;
|
||||
vcc-pc-supply = <®_vcc_3v3>;
|
||||
vcc-pd-supply = <®_vcc_3v3>;
|
||||
vcc-pe-supply = <®_vcc_3v3>;
|
||||
vcc-pf-supply = <®_vcc_3v3>;
|
||||
vcc-pg-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
®_aldo {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vdd33-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
®_hpldo {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
hpldoin-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
®_ldoa {
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
ldo-in-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
&ths {
|
||||
vref-supply = <®_aldo>;
|
||||
};
|
||||
1
device-tree/sun20i-d1-mangopi-mq-pro.dts
Symbolic link
1
device-tree/sun20i-d1-mangopi-mq-pro.dts
Symbolic link
@ -0,0 +1 @@
|
||||
../source/linux-riscv-6.8.0/arch/riscv/boot/dts/allwinner/sun20i-d1-mangopi-mq-pro.dts
|
||||
@ -1,231 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
#include "sun20i-d1.dtsi"
|
||||
#include "sun20i-d1-common-regulators.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MangoPi MQ Pro";
|
||||
compatible = "widora,mangopi-mq-pro", "allwinner,sun20i-d1";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &rtl8723ds;
|
||||
mmc0 = &mmc0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
hdmi_connector: connector {
|
||||
compatible = "hdmi-connector";
|
||||
type = "c";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out_connector>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-0 {
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */
|
||||
};
|
||||
};
|
||||
|
||||
reg_avdd2v8: avdd2v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "avdd2v8";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
vin-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
reg_dvdd: dvdd {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "dvdd";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
vin-supply = <®_vcc_3v3>;
|
||||
};
|
||||
|
||||
reg_vdd_cpu: vdd-cpu {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd-cpu";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
vin-supply = <®_vcc>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 6 17 GPIO_ACTIVE_LOW>; /* PG17 */
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <®_vdd_cpu>;
|
||||
};
|
||||
|
||||
&de {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_out {
|
||||
hdmi_out_connector: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
|
||||
disable-wp;
|
||||
vmmc-supply = <®_vcc_3v3>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
bus-width = <4>;
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_vcc_3v3>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
rtl8723ds: wifi@1 {
|
||||
reg = <1>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */
|
||||
interrupt-names = "host-wake";
|
||||
};
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
vcc-pe-supply = <®_avdd2v8>;
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-0 = <&spi1_pd_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0_pg12_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*&i2c1 {
|
||||
pinctrl-0 = <&i2c1_pb4_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};*/
|
||||
|
||||
/*&i2c2 {
|
||||
pinctrl-0 = <&i2c2_pc0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};*/
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-0 = <&i2c3_pe16_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_pb8_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
uart-has-rtscts;
|
||||
pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "realtek,rtl8723ds-bt";
|
||||
device-wake-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18 */
|
||||
enable-gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG15 */
|
||||
host-wake-gpios = <&pio 6 14 GPIO_ACTIVE_HIGH>; /* PG14 */
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-0 = <&uart2_pc0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*&uart3 {
|
||||
uart-has-rtscts;
|
||||
pinctrl-0 = <&uart3_pd10_pins>, <&uart3_pd13_rts_cts_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};*/
|
||||
|
||||
&uart4 {
|
||||
pinctrl-0 = <&uart4_pb2_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*&uart5 {
|
||||
pinctrl-0 = <&uart5_pb4_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};*/
|
||||
|
||||
&pwm {
|
||||
//pinctrl-0 = <&pwm0_pb12_pin>, <&pwm2_pd18_pin>;
|
||||
pinctrl-0 = <&pwm0_pb12_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
usb0_vbus-supply = <®_vcc>;
|
||||
status = "okay";
|
||||
};
|
||||
File diff suppressed because it is too large
Load Diff
1
device-tree/sun20i-d1.dtsi
Symbolic link
1
device-tree/sun20i-d1.dtsi
Symbolic link
@ -0,0 +1 @@
|
||||
../source/linux-riscv-6.8.0/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
|
||||
1
device-tree/sun20i-d1s.dtsi
Symbolic link
1
device-tree/sun20i-d1s.dtsi
Symbolic link
@ -0,0 +1 @@
|
||||
../source/linux-riscv-6.8.0/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
|
||||
1
device-tree/sunxi-d1-t113.dtsi
Symbolic link
1
device-tree/sunxi-d1-t113.dtsi
Symbolic link
@ -0,0 +1 @@
|
||||
../source/linux-riscv-6.8.0/arch/riscv/boot/dts/allwinner/sunxi-d1-t113.dtsi
|
||||
1
device-tree/sunxi-d1s-t113.dtsi
Symbolic link
1
device-tree/sunxi-d1s-t113.dtsi
Symbolic link
@ -0,0 +1 @@
|
||||
../source/linux-riscv-6.8.0/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
|
||||
2
source/README.md
Normal file
2
source/README.md
Normal file
@ -0,0 +1,2 @@
|
||||
# Download the sources here if desired
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user