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lib: sbi: Extends sbi_ipi_raw_send() to use all available IPI devices

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A platform may contain multiple IPI devices. In certain use cases,
such as power management, it may be necessary to send an IPI through a
specific device to wake up a CPU. For example, if an IMSIC is powered
down and reset, the core cannot receive IPIs from it, so the wake-up must
instead be triggered through the CLINT.

Suggested-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Nick Hu <nick.hu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-8-69a132447d8a@sifive.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Nick Hu 2025-10-20 14:34:10 +08:00 committed by Anup Patel
parent c2d2b9140a
commit 94f0f84656
4 changed files with 16 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
include/sbi/sbi_ipi.h
View File

@ -88,7 +88,7 @@ int sbi_ipi_send_halt(ulong hmask, ulong hbase);
void sbi_ipi_process(void); void sbi_ipi_process(void);
int sbi_ipi_raw_send(u32 hartindex); int sbi_ipi_raw_send(u32 hartindex, bool all_devices);
void sbi_ipi_raw_clear(bool all_devices); void sbi_ipi_raw_clear(bool all_devices);

2
lib/sbi/sbi_hsm.c
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@ -364,7 +364,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
(hsm_device_has_hart_secondary_boot() && !init_count)) { (hsm_device_has_hart_secondary_boot() && !init_count)) {
rc = hsm_device_hart_start(hartid, scratch->warmboot_addr); rc = hsm_device_hart_start(hartid, scratch->warmboot_addr);
} else { } else {
rc = sbi_ipi_raw_send(hartindex); rc = sbi_ipi_raw_send(hartindex, true);
} }
if (!rc) if (!rc)

14
lib/sbi/sbi_ipi.c
View File

@ -88,7 +88,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartindex,
*/ */
if (!__atomic_fetch_or(&ipi_data->ipi_type, if (!__atomic_fetch_or(&ipi_data->ipi_type,
BIT(event), __ATOMIC_RELAXED)) BIT(event), __ATOMIC_RELAXED))
ret = sbi_ipi_raw_send(remote_hartindex); ret = sbi_ipi_raw_send(remote_hartindex, false);
sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_SENT); sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_SENT);
@ -271,8 +271,10 @@ void sbi_ipi_process(void)
} }
} }
int sbi_ipi_raw_send(u32 hartindex) int sbi_ipi_raw_send(u32 hartindex, bool all_devices)
{ {
struct sbi_ipi_device_node *entry;
if (!ipi_dev || !ipi_dev->ipi_send) if (!ipi_dev || !ipi_dev->ipi_send)
return SBI_EINVAL; return SBI_EINVAL;
@ -287,7 +289,15 @@ int sbi_ipi_raw_send(u32 hartindex)
*/ */
wmb(); wmb();
if (all_devices) {
sbi_list_for_each_entry(entry, &ipi_dev_node_list, head) {
if (entry->dev->ipi_send)
entry->dev->ipi_send(hartindex);
}
} else {
ipi_dev->ipi_send(hartindex); ipi_dev->ipi_send(hartindex);
}
return 0; return 0;
} }

2
platform/generic/andes/ae350.c
View File

@ -35,7 +35,7 @@ static int ae350_hart_start(u32 hartid, ulong saddr)
* 2) the target hart is non-sleepable 25-series hart0 * 2) the target hart is non-sleepable 25-series hart0
*/ */
if (!sbi_init_count(hartindex) || (is_andes(25) && hartid == 0)) if (!sbi_init_count(hartindex) || (is_andes(25) && hartid == 0))
return sbi_ipi_raw_send(hartindex); return sbi_ipi_raw_send(hartindex, false);
/* Write wakeup command to the sleep hart */ /* Write wakeup command to the sleep hart */
smu_set_command(&smu, WAKEUP_CMD, hartid); smu_set_command(&smu, WAKEUP_CMD, hartid);