4 Commits

Author	SHA1	Message	Date
Stefan Roese	29caf9305b	cyclic: Use schedule() instead of WATCHDOG_RESET() ... Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]	2022-09-18 10:26:33 +02:00
Pali Rohár	b62450cf22	serial: Replace CONFIG_DEBUG_UART_BASE by CONFIG_VAL(DEBUG_UART_BASE) ... CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards to set different values for SPL, TPL and U-Boot Proper. For ns16550 driver this support is there since commit d293759d55cc ("serial: ns16550: Add support for SPL_DEBUG_UART_BASE"). Signed-off-by: Pali Rohár <pali@kernel.org>	2022-06-06 18:01:21 -04:00
Simon Glass	9539738509	treewide: Use OF_REAL instead of !OF_PLATDATA ... Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <sjg@chromium.org>	2021-09-25 09:46:15 -06:00
Weijie Gao	2161f1fcb3	serial: add uart driver for MediaTek MT7620 SoC ... This patch adds uart support for MediaTek MT7620 and earlier SoCs. The UART used by MT7620 is incompatible with the ns16550a driver. All registers of this UART have different addresses. A special 16-bit register for Divisor Latch is used to set the baudrate instead of the original two 8-bit registers (DLL and DLM). The driver supports of-platdata which is useful for tiny SPL. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>	2021-01-24 21:39:26 +01:00