This provides a common implementation of soc_clk_dump() for platforms
that use DM clock drivers but not the CCF.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Instead of having each clock driver implement soc_clk_dump() separately,
implement it at the uclass level, so the output can include all devices.
Add the .dump operation to support this.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This removes code that abused the device's platform data, interpreting
it as the uclass platform data.
Signed-off-by: Samuel Holland <samuel@sholland.org>
All the intitalization routines and values are taken from the
Bouffalolab MCU SDK @a574195a4b33:
https://github.com/bouffalolab/bl_mcu_sdk/
Signed-off-by: Michael Walle <michael@walle.cc>
This driver supports the pinmux, pinconf, and GPIO functions of the
Bouffalo Lab BL616 and BL808 SoCs.
Signed-off-by: Samuel Holland <samuel@sholland.org>
There is only one possible value for this field, it is unused except for
debugging, and the devicetree property is not documented.
Signed-off-by: Samuel Holland <samuel@sholland.org>
BL808 contains clocks and resets controlled by registers in several MMIO
regions, mostly because each MMIO region is in a separate power domain.
Add the descriptions for the known clocks and resets.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This driver supports most of the clocks in Bouffalo Lab SoCs, including
their parent selection, divider, and enable bits. It supports a
hierarchy of clocks provided by multiple devices/drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
There is no need to check the parent clock's ops. The following call to
clk_get_rate() does that already.
Signed-off-by: Samuel Holland <samuel@sholland.org>
clk_get_rate() can return an error value. Recompute the rate if the
cached value is an error value.
Fixes: 4aa78300a025 ("dm: clk: Define clk_get_parent_rate() for clk operations")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Do not return both NULL and error pointers. The function is only
documented as returning error pointers.
Fixes: 8a1661f20e6c ("drivers: clk: Handle gracefully NULL pointers")
Signed-off-by: Samuel Holland <samuel@sholland.org>
log_ret() cannot work with unsigned values, and the assignment to 'ret'
incorrectly truncated the rate on 64-bit platforms.
Fixes: 5c5992cb90cf ("clk: Add debugging for return values")
Signed-off-by: Samuel Holland <samuel@sholland.org>
All boards with this SoC share a generic board configuration.
This SoC contains two RISC-V processors that can run U-Boot: M0, a
32-bit T-HEAD E907, and D0, a 64-bit T-HEAD C906.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Use the vendor CSRs for enabling/disabling the caches, and the ISA
extension for cache maintenance.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Enable the T-HEAD ISA extensions, as these are required to use the cache
maintenance instructions. Enable the branch predictor and BTB to improve
performance. Some bits are only available on specific CPU models, so
provide Kconfig symbols for selecting the right model.
Signed-off-by: Samuel Holland <samuel@sholland.org>
T-HEAD C9xx and E9xx CPUs contain some extra CSRs which control the
branch predictor and cache-related functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Some RISC-V CPUs have a vendor-specific way to invalidate a portion of
the instruction cache. Allow them to override invalidate_icache_range().
Signed-off-by: Samuel Holland <samuel@sholland.org>
These are copied from the vendor's MCU SDK. They are not really
upstreamable, but they help with porting other code from the MCU SDK,
and they avoid wasting time due to typos in hand-copied register
definitions.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Convert to DM_SERIAL and drop the iomux board file
level init as it's handled as part of the DM serial
layer instead.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This moves over the PMIC power init to DM and the associated i2c and
regulator bits.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
