27378 Commits

Author SHA1 Message Date
Tom Rini
444cc6f080 ARM: stm32mp: Fix boot hang on STM32MP15xx with 1 GiB of DRAM.
-----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmfOptocHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/pkgJD/9d/E9CLGU19WEb6wP+
 58ADB3zwQXiqou00Dbbf/Sg7LfVsAfO09tbUCl5K1Z8ZpajGHeVZV0oXH8nwhiwj
 DOp15J9hyw3eMvDyBDwTkcgIyijIzq2sTKdMFmeAJNNe3tLn4drUk9YgaCwo6b0A
 vWSh3RaYwGUu1c0dVV52W57iFbpINNmZ/zzE5EF5HtW/mMDbGWgES9cSua4iRUuF
 ThH0/iYf8XZvHp8oy4YrnL33ykNSA8PrgsuQcBpOgGqQ7zkg/2NTY1O9itNul+nH
 PINjwi1dDRXSIcZRK6Y1Aksgzj/ujRPEsh73CJuoRMlkTm+ltf6FnrzxxPdAqnfx
 nMo5ZTH8cGkZ2QB0R2bXEci8U44CcNpbRl2iuHHfeNZqF4p0QdKdVYhOj4cYLmnQ
 vcvvHOPbYb14Quq/YHJVM5gPzlFs3XpcEKcjfYej1qlq+troN80bYNig/RvFkISd
 egbxMkMJ0yFGYOXy189unfFrl1T3Qssv3r1xjUNovtBufEitOFSL+IPe3+eIgzwK
 HOZoZ35/aq2CBhtsGqGyNTCGcFGg9Dxo7LfmiNeyno9X/+VCPQuOG84GUps7J5Fp
 2pXIeOI+ZJJF8krCAbXnLJOQ9Jy4IQ+BRcJA3U7Bpr0DijqJmqAXWkk3rOXEhTd7
 M4koJPQEsKKLsqRdUiFRCtJMqA==
 =03U9
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20250310' of https://source.denx.de/u-boot/custodians/u-boot-stm

ARM: stm32mp: Fix boot hang on STM32MP15xx with 1 GiB of DRAM.
2025-03-10 07:48:25 -06:00
Marek Vasut
f5ee0f2bf7 ARM: stm32mp: Fix dram_bank_mmu_setup() for ram_top=0
On STM32MP15xx with 1 GiB of DRAM, the gd->ram_top becomes 0,
because DRAM base 0xc0000000 + DRAM size 0x40000000 leads to
gd->ram_top overflow which resets it to 0. Handle this special
case simply by checking for gd->ram_top being zero, and if it
is, assume there is no addr >= gd->ram_top .

This fixes boot hang on STM32MP15xx with 1 GiB of DRAM.

Fixes: 25fb58e88aba ("ARM: stm32mp: Fix dram_bank_mmu_setup() for LMB located above ram_top")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-03-10 09:39:30 +01:00
Tom Rini
367971d205 AMD/Xilinx changes for v2025.04-rc4
Zynq:
 - Guard code around SPL_FS_LOAD_PAYLOAD_NAME
 
 Versal*:
 - Remove tftp block size 4096
 
 Versal:
 - Use clocks per DT binding
 - Store driver data in data section
 
 Versal Gen 2:
 - Fix major/minor version decoding
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZ8g41AAKCRDKSWXLKUoM
 IWoUAJwLRR8n8sSD8/CFMVRpRtKeWiHhKACghZ6WQjRBGTW8kX0Kyvrz14z/7Lw=
 =dzMG
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2025.04-rc4' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.04-rc4

Zynq:
- Guard code around SPL_FS_LOAD_PAYLOAD_NAME

Versal*:
- Remove tftp block size 4096

Versal:
- Use clocks per DT binding
- Store driver data in data section

Versal Gen 2:
- Fix major/minor version decoding
2025-03-05 12:11:18 -06:00
Simon Glass
ebe3c3c4a8 x86: Stop working around skip-at-start
With a recent Binman change, the skip-at-start property is now honoured,
meaning that all image-pos values in the affected section start from
the skip-at-start value.

The x86 code works around the old behaviour at present, so update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-04 08:22:11 -06:00
Michal Simek
f92623704e arm64: versal2: Show major and minor silicon version
ES1 silicon is 0x10 (16) and production is 0x20 (32) but correct number to
see are v1.0 or v2.0 instead of v16 or v32.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20095339334fe07f373ffae3bdbfec51f5a00dc7.1739882585.git.michal.simek@amd.com
2025-03-03 16:09:59 +01:00
Justin Klaassen
ed073246e8 rockchip: nanopi-r4s: Enable second usb port and fix crash
The patch enables the second USB3.0 Type-A USB port on the NanoPi R4S
board, which prevents a crash when initializing the usb system in U-Boot
and allows both Type-A USB ports to be used for booting.

=> usb start
starting USB...
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3c0000: "Synchronous Abort" handler, esr 0x96000010, far 0x0

Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-28 19:15:21 +08:00
Jonas Karlman
4871db6082 rockchip: rk3308-rock-s0: Fix SD-card boot on v1.1 hw revision
BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MMC
driver set PWREN high in dwmci_init().

However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.

Upstream Linux commit 26c100232b09 "arm64: dts: rockchip: Fix sdmmc
access on rk3308-rock-s0 v1.1 boards" fixed this issue by adding a
vcc_sd regulator.

Include the new vcc_sd regulator in SPL and enable required Kconfig
options to set GPIO4_D6 low to fix reading sdmmc on v1.1 hw revision.

Fixes: 25438c40a007 ("board: rockchip: Add Radxa ROCK S0")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-28 19:13:50 +08:00
Daniel Schultz
b78f8677cd arch: arm: dts: k3-am642-phycore-som-binman: Add custMpk to overlays
There are some device-tree overlays with missing entries for the
keyfile. Add them to sign all images in the U-Boot FIT image.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-02-27 08:07:38 -06:00
Daniel Schultz
c5aa4a4624 arch: arm: dts: k3-am625-phycore-som-binman: Add custMpk to overlays
There are some device-tree overlays with missing entries for the
keyfile. Add them to sign all images in the U-Boot FIT image.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-02-27 08:07:38 -06:00
Peng Fan
542cac02d0 imx8mm: imx8mm_evk: fix BOOTSTD boot
Select BOOTSTD_FULL and BOOTSTD_BOOTCOMMAND
Correct DEFAULT_FDT_FILE
Correct env file for imx8mm_evk_fspi_defconfig

Fixes: 364ba68ed1a ("imx: imx8mm_evk: Switch to BOOTSTD")
Reported-by: Ludwig Nussel <ludwig.nussel@siemens.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-02-27 08:14:37 -03:00
Tom Rini
5061eab96a Merge branch 'picasso' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Branch contains bringup of Acer Iconia Tab A500 (codename picasso), a
Tegra 2 Android device with decent Linux kernel support. Ondevice tests
and U-Boot test suit all passed.
2025-02-22 08:42:01 -06:00
Johan Jonker
d4aac2894a rockchip: use OF_UPSTREAM for rk3036
The device tree for rk3036 combined is now
available in the /dts/upstream directory.
Use imply OF_UPSTREAM to migrate all rk3036 boards.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
2025-02-19 23:14:50 +08:00
Jonas Karlman
d5fc369a59 rockchip: sdram: Ensure ram_base is correct in SPL
Most Rockchip SoCs use 0x0 as DRAM base address, however some SoCs use
0x60000000 and RK3576 use 0x40000000 as DRAM base address.

CFG_SYS_SDRAM_BASE is defined with correct address for each SoC and
U-Boot proper use this to set correct gd->ram_base in setup_dest_addr().

SPL never assign any value to gd->ram_base and instead use the default,
0x0. Set correct gd->ram_base in dram_init() to ensure its correctness
in SPL.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-19 23:11:06 +08:00
Jonas Karlman
356236126d rockchip: sdram: Limit usable ram_top to max 4G
U-Boot only works correctly when it uses RAM below the 4G address
boundary on Rockchip SoCs. Limit usable gd->ram_top to max 4G.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-19 23:11:06 +08:00
Jonas Karlman
57ad1ed7e8 rockchip: sdram: Allow the first bank to extend beyond 4 GiB
Allow the first bank to extend beyond 4 GiB when the blob of space for
peripheral is located before start of DRAM, e.g. when start of DRAM
is 0x40000000 and continue beyond the 4 GiB mark.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-19 23:11:06 +08:00
Chen-Yu Tsai
64cec76899 rockchip: rk3399: grf: Fix enum typos for UART2
In the GRF header file, some instances of UART2 pinmux are prefixed with
"GRF_UART2DBG" while others have "GRF_UART2DGB".

Since UART2 is the default console UART and used for debugging, it is
more likely the name should be UART2DBG.

Fix the ones that are wrong.

Fixes: a2c08df3813b ("pinctrl: add driver for rk3399")
Fixes: fa72de10452c ("rockchip: arm64: rk3399: move grf register definitions to grf_rk3399.h")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-19 23:06:42 +08:00
Jonas Karlman
7622834065 Revert "rockchip: rk3399: Fix TPL build of bob and kevin"
These power rails must be on very early for the U-Boos TPL banner to be
show over debug UART.

This reverts commit 4576e65a5d6b10fd207c3a44061676ce0220d794.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-19 23:03:03 +08:00
Jonas Karlman
7dba748433 Revert "rockchip: rk3399: Drop unneeded bob and kevin board specific code"
These power rails must be on very early for the U-Boos SPL banner to be
show over debug UART.

This reverts commit af518a1dfe637cb4dc486d7a832585e4a48bc970.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-19 23:03:03 +08:00
Svyatoslav Ryhel
ad3ec11b39 board: acer: picasso: add Acer Iconia Tab A500 support
The Acer Iconia A500 is a tablet computer designed, developed and
marketed by Acer Inc. It is powered by 1 GHz Nvidia Tegra 2 processor
and 1GB DDR2 RAM. The A500 is sold with 64 GB, although both 16 GB
and 32 GB models are available.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-16 19:11:43 +02:00
Marek Vasut
9f95282f31 arm64: Add late jump to kernel board hook
Add empty weak assembler function armv8_switch_to_el2_prep() which is
jumped to just before U-Boot determines which EL it is running in and
decides which path to take to boot the Linux kernel.

This weak function is meant to be used by architecture specific code
to implement jump to a firmware blob, which then returns right past
this weak function and continues execution of U-Boot code which then
boots the Linux kernel. One example of such use case is when U-Boot
jump tp TFA BL31, which switches from EL3 to EL2 and then returns to
U-Boot code newly running in EL2 and starts the Linux kernel.

The weak function is called with caches already disabled and DM shut
down. Any preparatory work or even loading of more data must be done
in board_prep_linux(), this hook is meant only for the final jump to
the firmware and return to U-Boot before booting Linux.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-15 14:44:43 +01:00
Svyatoslav Ryhel
279289e0cf ARM: tegra124: dts: mark HOST1X and DC with pre-relocation flag
Same as on previous SoC generations this is required for proper
video output work.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-13 16:52:13 +02:00
Svyatoslav Ryhel
dedc0468b2 ARM: tegra124: dts: add missing DSI nodes
Bind missing DSI and MIPI calibration devices.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-12 10:35:17 +02:00
Svyatoslav Ryhel
f47a02825a ARM: tegra30: dts: complete DSI nodes
Sync DSI nodes with Linux tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-12 10:35:17 +02:00
Svyatoslav Ryhel
c3d8c206dc ARM: tegra210: clock: implement PLLD2 support
PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-12 10:35:17 +02:00
Svyatoslav Ryhel
e4f5741c6d ARM: tegra124: clock: implement PLLD2 support
PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-12 10:35:17 +02:00
Tom Rini
7f89b40f1c Merge tag 'u-boot-dfu-20250211' of https://source.denx.de/u-boot/custodians/u-boot-dfu
u-boot-dfu-20250211:

CI:
- https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/24556

Android:
- Handle boot images with missing DTB

Usb gadget:
- Fix nullptr in g_dnl when serial# is unset
- Add missing schedule() in f_mass_storage gadget
- Add support for STih407 in dwc3-generic
- Fix usb clocks on STih407
- Migrate STih407 to DM_USB_GADGET
2025-02-11 08:56:54 -06:00
Patrice Chotard
3810cd52cb ARM: dts: sti: Add fixed clock for ehci and ohci nodes in stih410-b2260.dtsi
On STi platforms, all clocks are enabled by BOOTROM, so CONFIG_CLK is
not set as no clock driver for STI exists.

As ehci-generic and ohci-generic drivers are used on platforms where
CONFIG_CLK is set, clk_get_bulk() returns-ENOSYS in case of
stih410-b2260.
To avoid this error, add fixed clocks for ehci and ohci nodes for
stih410-b2260 to fix the following errors:

Bus usb@9a03c00: ohci_generic usb@9a03c00: Failed to get clocks (ret=-19)
Port not available.
Bus usb@9a03e00: ehci_generic usb@9a03e00: Failed to get clocks (ret=-19)
Port not available.
Bus usb@9a83c00: ohci_generic usb@9a83c00: Failed to get clocks (ret=-19)
Port not available.
Bus usb@9a83e00: ehci_generic usb@9a83e00: Failed to get clocks (ret=-19)
Port not available.
scanning bus dwc3@9900000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250130163547.512990-2-patrice.chotard@foss.st.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-11 09:00:42 +01:00
Tom Rini
ac5d05f070 Merge patch series "Enable MCU ESM reset"
Judith Mendez <jm@ti.com> says:

This patch series enables ESM reset configuration in board_init_f
for am62x and am62px devices.

This is necessary in order for error events to reset the system.

This patches are tested using watchdog to reset the system via ESM.

Link: https://lore.kernel.org/r/20250129234403.574766-1-jm@ti.com
2025-02-10 10:32:03 -06:00
Santhosh Kumar K
630fe2f88a arm: mach-k3: am62*_init: Probe ESM nodes
On AM62A and AM62P devices, it is possible to route Main ESM error
events to MCU ESM. MCU ESM high error output can trigger the reset
logic to reset the device. So, for these devices we have Main ESM and
MCU ESM nodes in the device tree. Add functions to probe these nodes
if CONFIG_ESM_K3 is enabled.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
2025-02-10 10:30:41 -06:00
Weijie Gao
738deb56b6 mediatek: mt7981: enable ethernet switch auto-detction
This patch enables switch auto-detction for mt7981 as some new mt7981
boards will use AN8855 ethernet switch.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-10 10:28:31 -06:00
Wadim Egorov
7c652360c8 arch: arm: dts: phyboard-electra-uboot.dtsi: Add bootph props to i2c
Add bootph-all properties to I2C0 nodes to ensure the bus and EEPROM
are accessible across all stages. This enables reading the SoM
configuration at any point during the boot process.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2025-02-10 10:28:05 -06:00
Weijie Gao
6331b8b0c8 mediatek: mt7986: rename pinctrl to pio in mt7986-u-boot.dtsi
The change from pinctrl to pio was missing in mt7986-u-boot.dtsi and will
cause build failure. Now fix it.

Fixes: f1775996ba9 (mediatek: mt7986: move gpio-controller up and rename pinctrl to pio)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-10 10:26:54 -06:00
Tom Rini
7a20c89bd0 Merge patch series "led: add function naming option from linux"
Heiko Schocher <hs@denx.de> says:

In linux we have the option to create the name of a led
optionally through the following properties:

- function
- color
- function-enumerator

This series adds support for parsing this properties if there
is no label property.

Link: https://lore.kernel.org/r/20250128135246.74838-1-hs@denx.de
[trini: Document name parameter in led.h]
2025-02-07 11:39:24 -06:00
Heiko Schocher
592b6f394a led: add function naming option from linux
in linux we have the option to create the name of a led
optionally through the following properties:

- function
- color
- function-enumerator

This patch adds support for parsing this properties if there
is no label property.

The led name is created in led_post_bind() and we need some
storage place for it. Currently this patch prevents to use
malloc() instead it stores the name in new member :

        char name[LED_MAX_NAME_SIZE];

of struct led_uc_plat. While at it append led tests for the
new feature.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-02-07 10:53:39 -06:00
Tom Rini
c2e00482d0 AMD/Xilinx changes for v2025.04-rc2
fpga:
 - Cleanup help
 - Show xilinx only options on Xilinx devices
 
 ospi-versal:
 - Fix alignment issue
 - Fix cadence_qspi_flash_reset() prototype
 
 zynqmp:
 - Define usb_pgood_delay
 - Fix bootseq number
 
 versal:
 - Fix mini_ospi configuration
 
 versal2:
 - Enable OPTEE
 
 xilinx:
 - Enable some flashes
 - Clean up SYS_MALLOC_F_LEN Kconfig
 - Some binman fixes
 - DT updates
 - Enable mkfwumdata compilation
 - Enable meminfo command
 - Switch to LWIP and enable HTTPS
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZ6OGPwAKCRDKSWXLKUoM
 ISZMAJ9hXIqJK8cr0TuZ7RGtkIi5XsPYWgCfbwdPUNsuDJtaUqW1r/kHUhRmhBE=
 =KKto
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2025.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.04-rc2

fpga:
- Cleanup help
- Show xilinx only options on Xilinx devices

ospi-versal:
- Fix alignment issue
- Fix cadence_qspi_flash_reset() prototype

zynqmp:
- Define usb_pgood_delay
- Fix bootseq number

versal:
- Fix mini_ospi configuration

versal2:
- Enable OPTEE

xilinx:
- Enable some flashes
- Clean up SYS_MALLOC_F_LEN Kconfig
- Some binman fixes
- DT updates
- Enable mkfwumdata compilation
- Enable meminfo command
- Switch to LWIP and enable HTTPS
2025-02-06 08:09:54 -06:00
Liya Huang
93bcabd9b2 arm: Correct dependency for STATIC_MACH_TYPE
Kconfig should not display the STATIC_MACH_TYPE option when
SUPPORT_PASSING_ATAGS is not selected. For example, when using most
platforms with menuconfig, it shows the STATIC_MACH_TYPE option causing
confusion.  As we know, this should not occur when SUPPORT_PASSING_ATAGS
is not selected

[trini: Reword commit message]
Signed-off-by: Liya Huang <1425075683@qq.com>
2025-02-05 12:43:48 -06:00
Liya Huang
b16e1db2a0 armv7m: kconfig adds the NVIC option and masks the GIC option when NVIC is selected
ARMv7-M architecture uses NVIC instead of GIC.
NVIC is an interrupt controller specially designed for
ARM Cortex-M series processors.

Signed-off-by: Liya Huang <1425075683@qq.com>
2025-02-05 12:43:38 -06:00
Michal Simek
eade90fd00 arm64: zynqmp: Describe images without TF-A
U-Boot can run out of EL3, NS-EL2 and NS-EL1. Currently default
configuration is NS-EL2 with TF-A but when TF-A is not passed and
configured images can still boot just fine. That's why support this
configuration and describe it via binman.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9b3dad80138e97005df3d033b4611c9d7e05a177.1738659214.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
f339584992 arm64: zynqmp: Use DTB address base from .config
CONFIG_XILINX_OF_BOARD_DTB_ADDR holds DTB address which U-Boot is checking.
Currently address in binman match default value but macro can be used
directly.
Also sync node name (s/hash-1/hash/) and sync location to have the same
order load/hash/image.

All binman DTSes are compiled that's why also guard
CONFIG_XILINX_OF_BOARD_DTB_ADDR which depends on OF_BOARD || OF_SEPARATE
which is a problem for mini configurations which are using OF_EMBED.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a22c9671b965b222bfd419f5bfaee012929f3d88.1738659214.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
89e26b49a9 arm64: zynqmp: Fix TEE loading address and add hash
There is incorrect loading address listed for TEE.
CONFIG_BL32_LOAD_ADDR should be used.
Also there is missing hash for this entry which is present for other nodes.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4e7e3a7110acc050ea7c06ac661e5b5be46e8602.1738659214.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
c4a7112536 arm64: zynqmp: Describe ethernet controllers via aliases on SOM
Add ethernet aliases to CC (Carrier card) description to create a
connection which is used by fdt_fixup_ethernet() for updating
local-mac-address in DT.
On Kria SOM MAC address is read from i2c eeprom at start and based on it
environment variables are created. Without creating aliases U-Boot is not
able to inject local-mac-address DT property and OS won't get the same MAC
address unless another i2c read is happening in OS.
Also aliases are using string not phandle that's why full path has to be
provided but that shouldn't be a big issue because location of ethernet
controller is fixed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6d360e71a0530d201578e27a6997dbd472772e39.1737466907.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Prasad Kummari
0184f3eead arm64: zynqmp: enable u-boot itb generation via binman if SPL is enabled
Output images are generated via Binman only if SPL is enabled, as
there is no consumer for them otherwise. An #ifdef check ensures that
when SPL is enabled, Binman generates the U-Boot ITB. If SPL is disabled,
ITB generation is skipped since the ITB format is supported only by SPL.
Without SPL, generating such an image is unnecessary, as it would not be
used

The second reason is that when a DTB is passed, the current logic cannot
handle it without an additional step in U-Boot to parse an appended FIT
image and enable board-specific code to select the correct DTB config.
The MULTI_DTB_FIT configuration should be used if support for multiple
DTBs is required, but SPL is not being used.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7cba738ae36dacf7d1b0cfbaf13e0c9b3a0df225.1737462296.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
5f87bc16d4 xilinx: Remove SYS_MALLOC_F_LEN setup via board Kconfig
The commit e05689242238 ("Kconfig: Change SYS_MALLOC_F_LEN default to
0x2000") already setup default values from board Kconfigs that's why no
reason to duplicate it again.

Fixes: e05689242238 ("Kconfig: Change SYS_MALLOC_F_LEN default to 0x2000")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c3edd75b7a19d5cc205c9d5c37c2d86189ca3de6.1737380025.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Marek Vasut
8a2ffd5a85 arm64: renesas: Add R-Car S4 Starter Kit support
Add support for the R-Car S4 Starter Kit with R8A779F4 SoC support.
This implementation natively uses OF_UPSTREAM to pull in most recent
DT. The defconfig is derived from S4 Spider, with reduced UART baud
rate to 921600 Bdps. The DT alias to rswitch is removed as the alias
should point to rswitch ports, not to rswitch itself, see [1].

[1] https://lore.kernel.org/linux-arm-kernel/20250118111344.361617-5-marek.vasut+renesas@mailbox.org/

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-04 23:32:00 +01:00
Marek Vasut
5392ad2fd9 remoteproc: renesas: Synchronize caches across cores
Explicitly flush icache on the CR52 core before jumping to the next
stage software to make sure it does not contain any invalid content.
Explicitly flash and invalidate dcache on the CA76 core both over the
trampoline buffer and over the CR52 firmware, and then trigger full
system synchronization, to make sure the data surely land in DRAM,
from where the CR52 can surely pick them up.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-04 23:32:00 +01:00
Tom Rini
bfaed6969c Merge patch series "mediatek: final preparation for OF_UPSTREAM support"
Christian Marangi <ansuelsmth@gmail.com> says:

This is the last batch of part to push actual support of
OF_UPSTREAM for the mediatek SoC.

The plan is to make the current downstream DTS on part with
upstream implementation so we can permit a gradual transition to
it while we don't cause any regression to any user.

This is to have the same node downstream and upstream.
Mediatek is working hard upstream to also push all the remaining
nodes.

All patch are the final changes after the pinctrl patch
merged previously.

All patch pass CI tests

Link: https://github.com/u-boot/u-boot/pull/731
Link: https://lore.kernel.org/r/20250127134046.26345-1-ansuelsmth@gmail.com
2025-02-04 11:57:36 -06:00
Christian Marangi
c6f8119dc4 arm: dts: mediatek: add PCIe node for MT7981
Add PCIe node for MT7981 with all the required properties to make PCIe
work.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
John Crispin
5fa18e47e4 arm: dts: mediatek: add USB nodes for MT7981
Add USB PHY nodes for MT7981. These are needed for USB support and also
for PCIe support as the u3 PHY can also be used for PHY.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
4d173d4a64 mediatek: mt7981: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.

Update any DTS that reference the pinctrl to follow the new naming and
structure.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
cd06e60c44 mediatek: mt7988: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.

Update any DTS that reference the pinctrl to follow the new naming and
structure.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00