27378 Commits

Author SHA1 Message Date
Marek Vasut
241518cfce ARM: dts: stm32: Duplicate cpu0-opp-table node into stm32mp15-u-boot.dtsi
The cpu0-opp-table {} node does not exist in upstream Linux stm32mp151.dtsi
file, in order to enable conversion to OF_UPSTREAM, duplicate the node from
current U-Boot stm32mp151.dtsi into stm32mp15-u-boot.dtsi. This makes STM32
DTs buildable even with OF_UPSTREAM enabled. No functional change, since the
current U-Boot stm32mp151.dtsi already contains the cpu0-opp-table {} node,
stm32mp15-u-boot.dtsi is applied at the end, and does not bring in any new
content.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-10-16 20:12:35 +02:00
Sughosh Ganu
ad33ce2e6c x86: e820: use the lmb API for adding RAM memory
The EFI_CONVENTIONAL_MEMORY type is now being managed through the LMB
module. Add a separate function, lmb_arch_add_memory() to add the RAM
memory to the LMB memory map. The efi_add_known_memory() function is
now used for adding any other memory type to the EFI memory map.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2024-10-15 13:45:30 -06:00
Sughosh Ganu
9ec4065557 layerscape: use the lmb API's to add RAM memory
The EFI memory allocations are now being done through the LMB module,
and hence the memory map is maintained by the LMB module. Use the
lmb_arch_add_memory() API function to add the usable RAM memory to the
LMB's memory map.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2024-10-15 13:45:29 -06:00
Sughosh Ganu
695dbd5fae stm32mp: remove efi_add_known_memory() function definition
The efi_add_known_memory() function for the stm32mp platforms is adding
the EFI_CONVENTIONAL_MEMORY type. This memory is now being handled
through the LMB module -- the lmb_add_memory() adds this memory to the
memory map. Remove the definition of the now superfluous
efi_add_known_memory() function.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-15 13:45:29 -06:00
Sughosh Ganu
d83a763799 ti: k3: remove efi_add_known_memory() function definition
The efi_add_known_memory() function for the TI K3 platforms is adding
the EFI_CONVENTIONAL_MEMORY type. This memory is now being handled
through the LMB module -- the lmb_add_memory() adds this memory to the
memory map. Remove the definition of the now superfluous
efi_add_known_memory() function.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-15 13:45:29 -06:00
Marek Vasut
d2061828a4 dts: Deduplicate dtbs target
The dtbs: target is almost identical in all architecture Makefiles.
All architecture Makefiles include scripts/Makefile.dts . Deduplicate
the dtbs: target into scripts/Makefile.dts . No functional change.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> #qcom, OF_UPSTREAM
2024-10-14 19:32:04 -06:00
Tom Rini
c676fc3710 - Add Libre Computer boards into proper libre-computer board directory
- Add new Boards:
  - Libre Computer aml-s905d3-cc
  - Libre Computer aml-a311d-cc
 - Add capsule update to libretech-ac and the new boards since they have an onboard SPI nor flash
 - Fix HDMI support after sync to v6.11 and regulator enable from Marek
 - Fix khadas-vim3 android config for android-mainline kernel
 - Disable meson64 boot targets when configs are not eavailable
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Merge tag 'u-boot-amlogic-next-20241014' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- Add Libre Computer boards into proper libre-computer board directory
- Add new Boards:
 - Libre Computer aml-s905d3-cc
 - Libre Computer aml-a311d-cc
- Add capsule update to libretech-ac and the new boards since they have an onboard SPI nor flash
- Fix HDMI support after sync to v6.11 and regulator enable from Marek
- Fix khadas-vim3 android config for android-mainline kernel
- Disable meson64 boot targets when configs are not eavailable
2024-10-14 08:14:46 -06:00
Tom Rini
e87c5dfbaa Merge branch 'u-boot-nand-20241012' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash
This merge request add support for BCMBCA raw nand driver for bcm96846
board that switch using OF_UPSTREAM and allow use onfi ecc params when
they are available in the atmel nand controller

The patches pass the pipeline CI:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/22638
2024-10-14 08:13:23 -06:00
Neil Armstrong
b52364b942 dts: meson-g12-common-u-boot: do not disable canvas
We were disabling canvas, which causes meson vpu probe failure,
just stop and leave canvas alone.

Fixes: ce9fa7bffc5 ("ARM: dts: meson-g12a: add U-Boot specific DT for graphics")
Link: https://lore.kernel.org/r/20241008-u-boot-topic-g12-do-not-disable-canvas-v1-1-b89659370012@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14 09:06:16 +02:00
Neil Armstrong
12ea40d29d ARM: meson: add support for Libre Computer aml-s905d3-cc
Add support for the Libre Computer aml-s905d3-cc "Solitude" board:
https://libre.computer/products/aml-s905d3-cc/

The Solitude board has a Credit Card form factor, similar to the
the previous "Le Potato" card, but with the Amlogic A311D SoC,
MIPI DSI and CSI connectors. PoE header and a single USB2 Type-C
connector replacing the microUSB one for power and USB 2.0.

The board has an embedded SPI NOR flash, and EFI Capsule support
is added.

The GUID is dynamically generated for the board, to get it:
=> efidebug capsule esrt
========================================
ESRT: fw_resource_count=1
ESRT: fw_resource_count_max=1
ESRT: fw_resource_version=1
[entry 0]==============================
ESRT: fw_class=4302C3CB-2502-5EFE-87E0-894A8A322893
ESRT: fw_type=unknown
ESRT: fw_version=0
ESRT: lowest_supported_fw_version=0
ESRT: capsule_flags=0
ESRT: last_attempt_version=0
ESRT: last_attempt_status=success
========================================

On the host (with the aml_encrypt_g12a result binary):
$ eficapsule --guid 4302C3CB-2502-5EFE-87E0-894A8A322893 -i 1 u-boot.bin u-boot.cap

On the board (from USB disk containing u-boot.cap at root):
=> load usb 0:1 $kernel_addr_r u-boot.cap
=> efidebug capsule update $kernel_addr_r

The binary will then be flashed on the SPI.

Link: https://lore.kernel.org/r/20240920-u-boot-topic-libre-computer-solitude-alta-v1-2-8915b108840b@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14 09:06:16 +02:00
Neil Armstrong
9e6e6b034b ARM: meson: add support for Libre Computer aml-a311d-cc
Add support for the Libre Computer aml-a311d-cc "Alta" board:
https://libre.computer/products/aml-a311d-cc/

The Alta board has a Credit Card form factor, similar to the
the prvevious "Le Potato" card, but with the Amlogic A311D SoC,
MIPI DSI and CSI connectors. PoE header and a single USB2 Type-C
connector replacing the microUSB one for power and USB 2.0.

The board has an embedded SPI NOR flash, and EFI Capsule support
is added.

The GUID is dynamically generated for the board, to get it:
=> efidebug capsule esrt
========================================
ESRT: fw_resource_count=1
ESRT: fw_resource_count_max=1
ESRT: fw_resource_version=1
[entry 0]==============================
ESRT: fw_class=17E07D9D-4D91-53F4-8780-1D91F279C1A5
ESRT: fw_type=unknown
ESRT: fw_version=0
ESRT: lowest_supported_fw_version=0
ESRT: capsule_flags=0
ESRT: last_attempt_version=0
ESRT: last_attempt_status=success
========================================

On the host (with the aml_encrypt_g12a result binary):
$ eficapsule --guid 17E07D9D-4D91-53F4-8780-1D91F279C1A5 -i 1 u-boot.bin u-boot.cap

On the board (from USB disk containing u-boot.cap at root):
=> load usb 0:1 $kernel_addr_r u-boot.cap
=> efidebug capsule update $kernel_addr_r

The binary will then be flashed on the SPI.

Link: https://lore.kernel.org/r/20240920-u-boot-topic-libre-computer-solitude-alta-v1-1-8915b108840b@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14 09:06:16 +02:00
Tom Rini
29e5dbc55c Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
This switches all boards with the Allwinner H616/H618/H313/H700 SoCs over to
use OF_UPSTREAM. We are doing it for this SoC family only since the DTs
between the U-Boot and the kernel repo are exactly identical, whereas other
families have one compatibility fix in U-Boot to allow booting older kernels.
Other will follow if this plays out well.

The biggest chunk otherwise is adding support for an Anbernic game console,
using the H700 SoC. For that we need to enhance the DRAM support code, and
pick two DT commits from the mainline kernel/DT rebasing repo, followed
by the defconfig patch.

On top of that two small fixes for the old Allwinner A80.

Gitlab CI passed, and I booted that briefly on some boards, including an
H616 and an H618 one (with LPDDR4).
2024-10-13 20:25:41 -06:00
Tom Rini
96573a1312 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh 2024-10-13 20:25:22 -06:00
Tom Rini
580fb57736 Merge tag 'u-boot-imx-master-20241013' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22644

- Add fast authentication method for i.MX8M signing.
- Migrate imx8mp-debix-model-a to OF_UPSTREAM.
- Update MAINTAINERS file globs for i.MX6/i.MX8MP DHSOM.
- Improve ELE driver.
- Add i.MX8MP Dummy clk to fix regression.
2024-10-13 16:25:01 -06:00
Marek Vasut
0034edc2f4 sh: cache: Fill in invalidate_icache_all()
Implement invalidate_icache_all() by clearing all V bits in
IC and OC. This is done by setting CCR cache control register
ICI and OCI bits.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: u-boot@lists.denx.de
2024-10-13 23:20:07 +02:00
Tom Rini
82686e678e Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes,
resolve some whitespace issues and fix the name of the new apalis-tk1
env file by Tom.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-13 10:43:24 -06:00
Svyatoslav Ryhel
43800d7f6d usb: host: tegra: get usb phy configuration from phy node
Obtain USB phy configuration from phy node if such exists
and is enabled. If no, set default values.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:33:39 +03:00
Ion Agorria
539633805d arm: tegra: add AP20 and AP20H SKU
Add previously undocumented SKU - AP20H found in LG Optimus 2X (P990).
Correct existing T20_7 name as it's proper name is AP20.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:24:15 +03:00
Ion Agorria
2b323dce57 arm: tegra: fix typo in logging functions
Change %02X to %02x since it always displayed 00 otherwise.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:24:15 +03:00
Svyatoslav Ryhel
d7c98f2030 ARM: tegra-u-boot: add recipe for multi-dtb image
Buildman has difficulties with constructing multi-dtb images, so
let's add a temporary custom recipe for it.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Svyatoslav Ryhel
539800bf92 ARM: tegra: board2: add common dtb reselect logic
Add common logic for dynamic dtb switch and DM reload if board
features multi-dtb support.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Jonas Schwöbel
b515d7ae0d Tegra30: Add funcmux for UART over SD slot
Tegra 3 has UART-E exposable via SD card slot which may be
handy for debugging. This change only adds funcmux part, to
use UART-E on the device you additionally would need:
- set stdout-path to serial@70006400 (uarte)
- configure sdmmc1_dat3_py4 and sdmmc1_dat2_py5 pinmux for
  uarte
- disable or remove sdhci@7800000 node
- enable CONFIG_TEGRA_ENABLE_UARTE in defconfig
- set CFG_SYS_NS16550_COM to NV_PA_APB_UARTE_BASE in device
  header

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Gilles Talis
b970b73e1e arm64: imx: imx8mp-debix-model-a: Migrate to OF_UPSTREAM
Device tree for this board can be deleted. Device tree location
now points to the freescale/ directory.

Use absolute path to PMIC node entry and its regulators as
device tree in kernel does not provide corresponding labels

Signed-off-by: Gilles Talis <gilles.talis@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:45:36 -03:00
Peng Fan
03b415d753 imx8: Correct the SCU API return value check
The SCU API alreay has been converted to return Linux error code,
using SCU error code is not correct here, although SC_ERR_NONE is value
as 0.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:45:16 -03:00
Ye Li
e6bdb8dfde misc: ele_api: Add read/write shadow fuse APIs
Add ELE APIs to support read and write shadow fuses

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13 09:43:05 -03:00
Linus Walleij
25e46f8281 board: bcm96846: Switch to using OF_UPSTREAM
This board clearly develops first in Linux which had more
hardware listed, so let's start to use OF_UPSTREAM.
This makes the NAND driver work.

Suggested-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-12 18:10:57 +02:00
Linus Walleij
8439ab9b3d drivers: nand: bcmbca: Enable on BCM6846
The BCM6846 has the BRCMBCA NAND controller so enable
it.

Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-12 18:10:56 +02:00
Tom Rini
47e544f576 Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"
Simon Glass <sjg@chromium.org> says:

When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL

Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.

For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:

   #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)

In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.

This series starts a change in terminology and usage to resolve the
above issues:

- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
  'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
  defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_

It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.

This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.

The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
2024-10-11 12:23:25 -06:00
Simon Glass
5c10c8badf global: Rename SPL_TPL_ to PHASE_
Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.

Update the comment in bootstage to refer to this symbol, instead of
SPL_

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
c46760d596 global: Rename SPL_ to XPL_
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
bef9fdbed2 arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
a64e7d73d6 log: global: Rename warn_non_spl()
This should now refer to xPL rather than SPL, so update it throughout
the tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
80580cd981 xpl: Rename spl_phase_prefix() and spl_phase_name()
Use simpler names for these functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
6c49fc5882 xpl: Rename spl_next_phase() and spl_prev_phase()
Rename this to use the xpl prefix.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
456bdb70de xpl: Rename spl_phase() to xpl_phase()
Rename this function to indicate that it refers to any xPL phase.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
41ea75aa00 xpl: Rename spl_phase to xpl_phase_t
This name fits better with the new naming scheme, so update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
713bfc58f9 xpl: Rename u_boot_first_phase to xpl_is_first_phase()
This is a better name for this function, so update it.

Tidy up the function comment to mention VPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
0e01334fc1 tegra: Drop dependency on SPL_BUILD
SPL_BUILD is not a Kconfig symbol so perhaps the intent here is to
use SPL instead. But that changes the output size.

So drop the dependency on !SPL_BUILD since it does nothing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:46 -06:00
Tom Rini
c264a5940e Merge patch series "led: introduce LED boot and activity function"
Christian Marangi <ansuelsmth@gmail.com> says:

This series is a reworked version of the previous seried:
misc: introduce STATUS LED activity function

This series port and expand the legacy concept of LED boot from
the legacy Status LED API to new LED API.

One thing that many device need is a way to communicate to the
user that the device is actually doing something.

This is especially useful for recovery steps where an
user (for example) insert an USB drive, keep a button pressed
and the device autorecover.

There is currently no way to signal the user externally that
the bootloader is processing/recoverying aside from setting
a LED on.

A solid LED on is not enough and won't actually signal any
kind of progress.
Solution is the good old blinking LED but uboot doesn't
suggest (and support) interrupts and almost all the LED
are usually GPIO LED that doesn't support HW blink.

Additional Kconfg are also introduced to set the LED boot and
activity. Those are referenced by label.

A documentation for old and these new LED API is created.
2024-10-10 16:02:37 -06:00
Christian Marangi
aadf575050 test: dm: Expand ofnode options test with new helper
Expand ofnode options test with new generic helper for bool, int and
string.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-10 16:02:20 -06:00
Christian Marangi
9046279d92 test: dm: Add tests for LED boot and activity
Add tests for LED boot and activity feature and add required property in
sandbox test DTS.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-10 16:02:20 -06:00
Simon Glass
69616cec72 efi: arm: x86: riscv: Drop crt0/relocal extra- rules
The link rule (for $(obj)/%_efi.so) in scripts/Makefile.lib handles
pulling in efi_crt0.o and efi_reloc.o so drop the 'extra' rules.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2024-10-09 22:04:56 -06:00
Simon Glass
6fe80876dc efi_loader: Rename and move CMD_BOOTEFI_HELLO_COMPILE
This is not actually a command so the name is confusing. Use
BOOTEFI_HELLO_COMPILE instead. Put it in the efi_loader directory
with the other such config options.

The link rule (for $(obj)/%_efi.so) in scripts/Makefile.lib handles
pulling in efi_crt0.o and efi_reloc.o so drop the 'extra' rules.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-10-09 22:04:56 -06:00
Jernej Skrabec
6c49270960 sunxi: H616: dram: Update mbus priorities
CSI1 channel (22) is missing and IOMMU (25) has priority flag set in
vendor bootloader. Fix that.

While at it, replace bandwidth flag with priority since original flag has
always value "true".

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tested-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2024-10-10 00:23:42 +01:00
Jernej Skrabec
b37edefc20 sunxi: H616: DRAM: Adjust size scan procedure
It's safer to start scanning for columns first and then rows. Columns
reside on LSB address pins, which means that second configuration will
already have all needed row pins active.

This is also preparation for introducing DDR4 support, which need scan
for banks and bank groups too.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tested-by: Chris Morgan <macromorgan@hotmail.com>
2024-10-10 00:23:42 +01:00
Jernej Skrabec
d88668f913 sunxi: H616: DRAM: Adjust configuration procedure
When comparing configuration procedure to vendor driver, I noticed that
one command was out of order and that some delays were missing.

Fix that.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tested-by: Chris Morgan <macromorgan@hotmail.com>
2024-10-10 00:23:42 +01:00
Chris Morgan
30011d767e sunxi: H616: DRAM: Add alternative pin mapping
It seems that different dies need different PHY pin mapping. Select
alternatives at compile time.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
[adapted to switch from runtime to compile time config]
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
2024-10-10 00:23:42 +01:00
Jernej Skrabec
bc20c3ed24 sunxi: H616: dram: LPDDR4: adjust settings
Adjust H616 LPDDR4 DRAM settings to be in line with vendor driver.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tested-by: Chris Morgan <macromorgan@hotmail.com>
2024-10-10 00:23:41 +01:00
Andre Przywara
9c4b44d1e3 sunxi: H616: switch to OF_UPSTREAM
With the recent "old-style sunxi" sync and the penultimate OF_UPSTREAM DT
update, both directories were based on the same v6.10 kernel tree.
And while there is one subtle difference in many Allwinner SoC's DT
files, the H616 ones turn out to be identical.

Remove the old copies of the H616 related .dts and .dtsi files, and
switch the whole H616 SoC over to use OF_UPSTREAM. This immediately
benefits from the recent upstream DT update, to kernel v6.11.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-10-10 00:23:41 +01:00
Udit Kumar
fbe16bc280 arch: arm: dts: k3-j7200-r5-evm: Enable AVS feature
During DT sync with kernel 6.6, AVS feature was removed by mistake.
So adding back AVS feature.

Fixes: df73e791ce09("arm: dts: j7200: dts sync with Linux 6.6-rc1")

Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
2024-10-08 10:23:36 -06:00