3548 Commits

Author SHA1 Message Date
Patrice Chotard
b4e9b524f7 net: dwc_eth_qos: Fix compilation warning in eqos_free_pkt()
Fix compilation warning:

../arch/arm/include/asm/io.h: In function 'eqos_free_pkt':
../arch/arm/include/asm/io.h:103:32: warning: 'rx_desc' may be used uninitialized [-Wmaybe-uninitialized]
  103 | #define writel(v,c)     ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
      |                                ^~~
../drivers/net/dwc_eth_qos.c:1220:27: note: 'rx_desc' was declared here
 1220 |         struct eqos_desc *rx_desc;
      |                           ^~~~~~~

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2024-04-12 13:59:12 -06:00
Tom Rini
b566f7d239 Merge patch series "Introduce ICSSG Ethernet driver"
MD Danish Anwar <danishanwar@ti.com> says:

Introduce ICSSG PRUETH support in uboot. The ICSSG driver is used in TI
AM654 SR2.0.

The ICSSG PRU Sub-system runs on EMAC firmware. This series Introduces
support for ICSSG driver in uboot.

This series has been tested on AM65x SR2.0, and the ICSSG interface is
able to ping / dhcp and boot kernel using tftp in uboot.

To use ICSSG2 ethernet, the ICSSG firmware needs to be loaded to PRU RPROC
cores and RPROC cores need to be booted with the firmware. This step is
done inside driver similar to kernel.

The remoteproc driver uses request_fw_into_buf() API from fs-loader driver
to load and start rproc with the required firmwares.

This series only introduces driver files. The device tree and config
changes to enable ICSSG driver will be introduced later.
2024-04-12 13:59:12 -06:00
MD Danish Anwar
8ace084672 net: ti: icssg: Add support sending FDB command to update rx_flow_id
ICSSG firmware supports FDB commands. Add support to send FDB commands
from driver. Once rx_flow_id is obtained from dma, let firmware know that
we are using this rx_flow_id by sending a FDB command.

Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
2024-04-12 13:54:43 -06:00
MD Danish Anwar
737a668413 net: ti: icssg: Add ICSSG ethernet driver
This is the PRUSS Ethernet driver for TI AM654 SR2.0 and later SoCs with
the ICSSG PRU Sub-system running EMAC firmware. ICSSG Subsystem supports
two slices per instance. This driver caters to both slices / ports of
the icssg subsystem.

Since it is not possible for Ethernet driver to register more than one
port for a given instance, this patch introduces top level PRUETH as
UCLASS_MISC and binds UCLASS_ETH to individual ports in order to support
bringing up more than one Ethernet interface in U-Boot.

Since top level driver is UCLASS_MISC, board files would need to
instantiate the driver explicitly.

Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
2024-04-12 13:54:43 -06:00
MD Danish Anwar
ff7799907e net: ti: icssg: Add icssg queues APIs and macros
Add icssg_queue.c file. This file introduces macros and APIs related to
ICSSG queues. These will be used by ICSSG Ethernet driver.

Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
2024-04-12 13:54:43 -06:00
MD Danish Anwar
1c05cb469f net: ti: icssg: Add Firmware config and classification APIs.
Add icssg_config.h / .c and icssg_classifier.c files. These are firmware
configuration and classification related files. Add MII helper APIs and
MACROs. These APIs and MACROs will be later used by ICSSG Ethernet driver.
Also introduce icssg_prueth.h which has definition of prueth related
structures.

Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
2024-04-12 13:54:43 -06:00
MD Danish Anwar
8cb5f079ac net: ti: icssg: Add Firmware Interface for ICSSG Ethernet driver.
Add firmware interface related headers and macros for ICSSG Ethernet
driver. These macros will be later used by the ICSSG ethernet driver.

Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
2024-04-12 13:54:43 -06:00
Michael Walle
0b06527373 net: ti: am65-cpsw: Fix buffer overflow
The device name is a concatenation of the device node name of the cpsw
device and of the device node name of the port. In my case that is

  ethernet@8000000
  port@1

First the buffer is really too small, but more importantly, there is no
boundary check. Use snprintf() and increase the buffer size.

Fixes: 38922b1f4acc ("net: ti: am65-cpsw: Add support for multi port independent MAC mode")
Signed-off-by: Michael Walle <mwalle@kernel.org>
2024-04-11 15:52:19 -06:00
Heinrich Schuchardt
f12001b131 net: dw_eth_qos: Add missing \n in error messages.
Missing line-feeds in error messages lead to output like:

    phy_startup() failed: -110FAILED: -110=>

Output like the following is much easier to read:

    phy_startup() failed: -110
    FAILED: -110
    =>

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-04-10 09:34:53 -06:00
Ye Li
9dc7d5270b net: fec_mxc: Avoid enable regulator failure
Change to regulator_set_enable_if_allowed to avoid enable failure,
in case same phy supply shared by multiple FEC controllers.

Signed-off-by: Ye Li <ye.li@nxp.com>
2024-03-30 15:12:00 -03:00
Marek Vasut
e99a6efa80 net: phy: Factor out PHY GPIO reset code
Pull the PHY GPIO reset code into separate function, since
this is and will be reused multiple times. Set up default
reset assert and deassert timing to generous 20ms and 1ms
for maximum compatibility in case those DT properties are
missing.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-03-26 19:58:26 -04:00
Marjolaine Amate
85d44e424a e1000: add support for i225-IT
This patch adds support for i225-IT in e1000 driver.
Add e1000_phy_igc.

Signed-off-by: Marjolaine Amate <marjolaine.amate@odyssee-systemes.fr>
2024-03-26 19:58:26 -04:00
Jacky Chou
cc09160f30 net: phy: ncsi: reslove the unaligned access issue
From the ethernet header is not on aligned, because the length
of the ethernet header is 14 bytes.
Therefore, unaligned access must be done here.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
2024-03-26 19:58:26 -04:00
Jacky Chou
60d77b6f91 net: phy: ncsi: Correct the endian of the checksum
There is no need to perform the endian twice here.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
2024-03-26 19:58:26 -04:00
Yang Xiwen
0eedd1e564 net: hifemac: make some functions static
They are not required to be global, make them static.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2024-03-26 19:58:26 -04:00
Yang Xiwen
abcb26cb1f net: hifemac: implement net stats needed ops
3 operations needed by `net stats` are implemented. New `net stats`
output some useful info.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2024-03-26 19:58:26 -04:00
Yang Xiwen
561856ec5e net: hifemac: register MDIO bus device for subnode
register internal MDIO bus device if it is a subnode.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2024-03-26 19:58:26 -04:00
Yang Xiwen
a91263c321 net: hifemac: fix log reporting
shrink the first argument of log_msg_ret(), add dev_xxx() functions for
error reporting.

Fixes: 9d8f78a2a79f7 ("net: add hifemac Ethernet driver for HiSilicon platform")

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2024-03-26 19:58:26 -04:00
Yang Xiwen
3724ec4e5c net: hifemac_mdio: use log_msg_ret() correctly, report error by dev_err()
The initial commit used log_msg_ret() wrongly. Fix that by moving error
report to a separate dev_err() call and shrink the first argument of
log_msg_ret() to no more than 4 chars.

Fixes: 6b5c8d98e204 ("net: add hifemac_mdio MDIO bus driver for HiSilicon platform")

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2024-03-26 19:58:26 -04:00
Jacky Chou
f146c446e5 net: phy: the NC-SI phy device do not require mdio bus
As with fixed-link phy device, the NC-SI phy devive does not
require an mdio bus. So, a condition is added to check the
NC-SI phy id to avoid accessing the bus pointer that is NULL.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
2024-03-26 19:58:26 -04:00
Eugeniu Rosca
f5dbfc82a9 net: phy: Fix signed shift overflow
Booting R-Car Gen3 arm64 U-Boot with CONFIG_UBSAN=y resulted in:

 =====================================================================
 UBSAN: Undefined behaviour in drivers/net/phy/phy.c:728:19
 left shift of 1 by 31 places cannot be represented in type 'int'
 =====================================================================

Fix it by appending the UL suffix to the numeric literal. While at it,
convert the type of "addr" variable from signed to unsigned, to protect
against shifting the numeric literal by a negative value (which would
lead to yet another undefined behavior).

Fixes: 1adb406b0141 ("phy: add phy_find_by_mask/phy_connect_dev")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>

* Using U-suffix for integer is sufficient.
* ffs() of non-zero value cannot be 0. But addr being unsigned is
* preferable.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-03-26 19:58:26 -04:00
Marek Vasut
388cb2d321 net: phy: broadcom: Configure LEDs on BCM54210E
Configure LEDs on BCM54210E so they would blink on activity
and indicate link speed. Without this the LEDs are always on
if cable is plugged in.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-03-26 19:58:26 -04:00
Jacky Chou
22f314e01c net: phy: ncsi: fixed not nullify the pointers after free
The issue occurs the UAF (use-after-free) to cause double free
when do the realloc function for the pointers during the
reinitialization NC-SI process, and it will cause the memory
management occurs error.
So, nullify these pointers after free.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
2024-03-26 19:58:26 -04:00
Quentin Schulz
9f5df9a3ef rockchip: include asm/io.h directly in asm/arch-rockchip/hardware.h
The different macros use writel which is defined in asm/io.h, so let's
include the header so users of hardware.h do not need to include
asm/io.h as well.

While at it, remove asm/io.h includes wherever
asm/arch-rockchip/hardware.h is included already.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:15:52 +08:00
Tom Rini
20a0ce574d Prepare v2024.04-rc4
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Merge tag 'v2024.04-rc4' into next

Prepare v2024.04-rc4
2024-03-11 15:27:20 -04:00
Marek Vasut
91e70367a5 net: phy: Use PHY MDIO address from DT if available
In case the PHY is fully described in DT, use PHY MDIO address
from DT directly instead of always using auto-detection. This
also fixes the behavior of 'mdio list' in such DT setup, which
now prints the PHY connected to the MAC correctly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-03-09 10:58:48 -05:00
Roger Quadros
be2eb3ad8f net: am65-cpsw: cpsw_mdio: Switch to proper DM_MDIO framework
Add a new Kconfig symbol MDIO_TI_CPSW for the CPSW MDIO
driver and build it with proper DM support if enabled.

If MDIO_TI_CPSW is not enabled then we continue to
behave like before.

Clean up MDIO custom handling in am65-cpsw and use
dm_eth_phy_connect() to get the PHY.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Tested-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
2024-03-07 07:59:16 -05:00
Marek Mojík
faf96b20ee net: mv88e6xxx: fix missing SMI address initialization
The mv88e6xxx driver does not currently initialize the smi_addr field, but
instead keeps the default zero value. This leads to driver being unusable
on devices where the switch is not on address zero of the mdio bus. Fix
this problem by reading the SMI address from device tree.

Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-03-05 08:27:59 +01:00
Marek Vasut
c2cffb01aa ARM: renesas: Rename RMOBILE_CPU_TYPE_* to RENESAS_CPU_TYPE_*
Rename RMOBILE_CPU_TYPE_* to RENESAS_CPU_TYPE_* because all
the chips are made by Renesas, while only a subset of them is
from the R-Mobile line.

Use the following command to perform the rename:

"
$ git grep -l '\<RMOBILE_CPU_TYPE_[A-Z0-9]\+\>' | \
  xargs -I {} sed -i 's@\<RMOBILE\(_CPU_TYPE_[A-Z0-9]\+\)\>@RENESAS\1@g' {}
"

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-03-02 14:29:36 -05:00
Marek Vasut
6bd3a95b67 ARM: renesas: Rename rmobile_get_cpu_type() to renesas_get_cpu_type()
Rename rmobile_get_cpu_type() to renesas_get_cpu_type() because
all the chips are made by Renesas, while only a subset of them
is from the R-Mobile line.

Use the following command to perform the rename:

"
$ git grep -l '\<rmobile_get_cpu_type\>' | \
  xargs -I {} sed -i 's@\<rmobile_get_cpu_type\>@renesas_get_cpu_type@g' {}
"

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-03-02 14:29:36 -05:00
BELOUARGA Mohamed
e3f2493d61 net: macb: Add support for fixed link
The actual driver does not work when there is no linked PHY. These
changes add support for fixed-link feature in the device tree.

Signed-off-by: BELOUARGA Mohamed <m.belouarga@technologyandstrategy.com>
2024-03-02 12:26:18 -05:00
Weijie Gao
172e32add3 net: mediatek: add support for XGMII interface
This patch add XGMII support for connecting 2.5G PHY.

Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-03-01 16:35:52 -05:00
Weijie Gao
85d1968e75 net: mediatek: add support for adjusting MDIO clock
User can assign a specific MDC speed to the eth node as follow:

&eth {
	...
	phy-mode = "usxgmii";
	phy-handle = <&phy8>;

	mdio {
		clock-frequency = <10500000>;
	};

	phy8: eth-phy@8 {
	      compatible = "ethernet-phy-id31c3.1c12";
	...
};

Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-03-01 16:35:52 -05:00
Nils Le Roux
a5f877a0bd net: designware: Support high memory nodes
Some platforms (such as the Lichee Pi 4A) have their dwmac device
addressable only in high memory space. Storing the node's base address
on 32 bits is not possible in such case.

Use platform's physical address type to store the base address.

Signed-off-by: Nils Le Roux <gilbsgilbert@gmail.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2024-02-12 13:41:03 -05:00
Radu Pirea (NXP OSS)
55fc0cbbd6 net: phy: nxp-c45-tja11xx: add tja1120 support
Add TJA1120 driver structure and report 1G speed.

Signed-off-by: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@oss.nxp.com>
2024-02-08 10:41:24 +08:00
Radu Pirea (NXP OSS)
7e02c3accb net: phy: nxp-c45-tja11xx: rename nxp_c45_tja11xx structure
Rename nxp_c45_tja11xx structure to nxp_c45_tja1103. The driver will
support more PHYs and nxp_c45_tja11xx is too generic.

Signed-off-by: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@oss.nxp.com>
2024-02-08 10:41:24 +08:00
Radu Pirea (NXP OSS)
84e57e7dfb net: phy: nxp-c45-tja11xx: read PHY the speed from hardware
Read PHY speed from hardware instead of assuming 100Mbps by default.
The TJA1103 works only at 100Mbps, but the driver will support more PHYs.

Signed-off-by: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@oss.nxp.com>
2024-02-08 10:41:23 +08:00
Radu Pirea (NXP OSS)
6c43208a6d net: phy: nxp-c45-tja11xx: use local definion of features
Use a local definition for the PHY features. PHY_100BT1_FEATURES are
not defined using the 100BaseT1 bit, so keep this workaround in the driver.

Signed-off-by: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@oss.nxp.com>
2024-02-08 10:41:23 +08:00
Jonas Karlman
f1e2f412b0 net: designware: Reset eth phy before phy connect
Some ethernet PHY require being reset before a phy-id can be read back
on the MDIO bus. This can result in the following message being show
on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY.

  Could not get PHY for ethernet@ff540000: addr -1

Add support to designware ethernet driver to reset eth phy by calling
the eth phy uclass function eth_phy_set_mdio_bus(). The call use NULL
as bus parameter to not set a shared mdio bus reference that would be
freed when probe fails. Also add a eth_phy_get_addr() call to try and
get the phy addr from DT when DM_MDIO is disabled.

This help fix ethernet on Radxa ROCK Pi E v1.21:

  => mdio list
  ethernet@ff540000:
  1 - RealTek RTL8211F <--> ethernet@ff540000

Reported-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04 18:02:45 +08:00
Lukasz Tekieli
c025c8afd4 net: phy: motorcomm: configure pad drive strength register
This ports the pad drive strength register configuration which can be
already found in the Linux driver for this PHY.

Signed-off-by: Lukasz Tekieli <tekieli.lukasz@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:49 +08:00
Sean Anderson
c9309f40a6 treewide: Remove clk_free
This function is a no-op. Remove it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
2024-01-29 22:35:02 -05:00
Maksim Kiselev
2bfab76f4c net: sun8i-emac: Add support for fixed-link phy
Make the "phy-handle" property optional, which allows support
for a fixed-link phy configuration.

Thus if the "phy-handle" is present in a DT, then driver will work as
before. Otherwise, phyaddr initialization will not be necessary,
as it is not needed in case of a fixed-link config.

Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2024-01-29 14:30:59 +00:00
Tom Rini
2ee7a8ec6f Merge patch series "net fixes prior lwip"
Maxim Uvarov <maxim.uvarov@linaro.org> says:

Add small net fixes prior lwip patches.
2024-01-11 11:25:07 -05:00
Maxim Uvarov
c64a1e43ac driver/net/rtl8139: remove debug print
debug print delays reset of the driver. Finally I see
bunch of "rx error FFFF" errors in the screen. CI can
not handle many prints. While network works fine there

Reproduced with:
make CROSS_COMPILE=sh2-linux- r2dplus_defconfig all
qemu-system-sh4 -M r2d -nographic -serial null \
-serial mon:stdio -net user,tftp=`pwd` \
-net nic,model=rtl8139 -kernel ./u-boot.bin

Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-01-11 11:24:58 -05:00
Maxim Uvarov
f5ead4c5fb net/smc911x: fix return from smc911x_send
return value of smc911x_send is ignored, but on sucesseful
send we need return 0 and or error -ETIMEOUT, not opposite.

Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-01-11 11:24:58 -05:00
Tom Rini
cb3ce95401 global: Drop common.h inclusion
In order to make it easier to move on to dropping common.h from code
directly, remove common.h inclusion from the rest of the header file
which had been including it.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-12-21 08:54:37 -05:00
Neil Armstrong
b4534ddeff net: Add Amlogic GXL MDIO Mux driver
Port the mdio-mux-meson-gxl.c Linux driver introduced in [1],
and adapt it to U-Boot.

This driver is needed to boot U-Boot with Linux DT since v6.4,
since it switched the MDIO mux from the mmio to a proper GXL driver.

[1] 9a24e1ff4326 ("net: mdio: add amlogic gxl mdio mux support")

Link: https://lore.kernel.org/r/20231213-u-boot-gxl-mdio-mux-v2-1-c56bb02a75ea@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-12-19 11:24:38 +01:00
Tom Rini
fa3f19aa56 Xilinx changes for v2024.04-rc1
zynqmp:
 - Introduce Kria specific defconfig
 - Calculate SPI image location based on boot offset
 - DT updates
 
 zynqmp-clk:
 - Fix topsw_lsbus_clock for DP
 
 axi-enet:
 - Support older DT binding
 
 mailbox:
 - Add support for multiple mailboxes
 
 pcie-xilinx:
 - Covert driver to newer interface
 - Enable MMIO region
 
 zynq:
 - dfu updates
 - Enable capsule update for Antminer S9
 - DT updates
 
 xilinx_spi:
 - Add new xfer callback and support runtime fifo depth discovery
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Merge tag 'xilinx-for-v2024.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2024.04-rc1

zynqmp:
- Introduce Kria specific defconfig
- Calculate SPI image location based on boot offset
- DT updates

zynqmp-clk:
- Fix topsw_lsbus_clock for DP

axi-enet:
- Support older DT binding

mailbox:
- Add support for multiple mailboxes

pcie-xilinx:
- Covert driver to newer interface
- Enable MMIO region

zynq:
- dfu updates
- Enable capsule update for Antminer S9
- DT updates

xilinx_spi:
- Add new xfer callback and support runtime fifo depth discovery
2023-12-14 13:27:11 -05:00
Sébastien Szymanski
f935716935 net: phy: realtek: Add support for RTL8211F(D)(I)-VD-CG
Add support for the RTL8211F(D)(I)-VD-CG PHY present on the i.MX93 EVK
board.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2023-12-13 09:48:38 -03:00
Sébastien Szymanski
9e1f79bd69 net: dwc_eth_qos: add i.MX93 support
Add support for DWC EQoS MAC on i.MX93.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-13 09:48:03 -03:00