97999 Commits

Author SHA1 Message Date
Ilias Apalodimas
4a1eeccde6 efi_loader: rename efi_bootmgr_image_return_notify
We use this event when returning from an EFI HTTP booted image.
The name is a bit confusing since it suggests we always run it,
rename it to make it clearer

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-12 17:32:18 +02:00
Ilias Apalodimas
292a4a4c7b efi_loader: shorten efi_bootmgr_release_uridp_resource()
We use this function to clean up leftover resources when booting an
EFI HTTP boot image, but the name is unnecessary long.

Shorten it to efi_bootmgr_release_uridp()

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-12 17:32:18 +02:00
Tom Rini
9eb0d731d8 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI result shows no issue:
https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/22315
----------------------------------------------------------------
- Aspeed: Add AST2700 board (Ibex RISC-V core) support
        - Add timer, dram controller, network support
- Sophgo: Add clock controller support for Milk-V Duo
2024-09-12 09:03:40 -06:00
Tom Rini
2857b983f8 Merge tag 'u-boot-imx-next-20240911' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22320

- Improve i.MX8M boot time by enabling MMU and D-cache very early.
- Don't drop the enable bit once set on the i.MX PWM driver.
- Enable DM_RNG so that the kaslr-seed property is set in the dt
  allowing Linux KASLR.
2024-09-11 19:07:53 -06:00
Miquel Raynal
5748aa1e37 pwm: imx: Don't drop the enable bit once set
Changing the duty-cycle should not blindly override (and clear) the
enable (EN) bit if it has already been set. For instance, a PWM
backlight can be enabled and set to a specific intensity using two
operations. The order of these operations should not matter.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2024-09-11 17:02:36 -03:00
Tim Harvey
4aea3110ab configs: venice: enable DM_RNG
Enable DM_RNG so that the kaslr-seed property is set in the dt allowing
Linux KASLR.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2024-09-11 16:43:40 -03:00
Marek Vasut
ac9153c74f ARM: imx: Enable MMU and dcache very early on i.MX8M
Enable MMU and caches very early on in the boot process on i.MX8M
in U-Boot proper. This allows board_init_f to run with icache and
dcache enabled, which saves some 700 milliseconds of boot time on
i.MX8M Plus based device.

The 'bootstage report' output is below:

Before:
```
Timer summary in microseconds (8 records):
       Mark    Elapsed  Stage
          0          0  reset
    961,363    961,363  board_init_f
  1,818,874    857,511  board_init_r
  1,921,474    102,600  eth_common_init
  2,013,702     92,228  eth_initialize
  2,015,238      1,536  main_loop

Accumulated time:
                32,775  dm_r
               289,165  dm_f
```

After:
```
Timer summary in microseconds (8 records):
       Mark    Elapsed  Stage
          0          0  reset
    989,466    989,466  board_init_f
  1,179,100    189,634  board_init_r
  1,281,456    102,356  eth_common_init
  1,373,857     92,401  eth_initialize
  1,375,396      1,539  main_loop

Accumulated time:
                12,630  dm_f
                32,635  dm_r
```

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2024-09-11 16:43:24 -03:00
Chia-Wei Wang
2db018d2ca configs: ibex-ast2700: Enable DRAM and timer driver
Enable the driver support for the DRAM and timer devices.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:04 +08:00
Chia-Wei Wang
a1ad11ce52 ram: ast2700: Add DRAM controller initialization
Add driver for AST2700 to initialize DRAM in SPL.

This patch also refactors the Kconfig dependency of
Aspeed DRAM drivers as some of them are shared among
the file structures of RV and ARM ISAs.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:03 +08:00
Chia-Wei Wang
73f802ac95 board: ibex_ast2700: Add FMC header support
Define and parse the header of the First Mutable Code (FMC)
of AST2700 SoCs at runtime phase.

The FMC header contains the information to load prebuilt binaries
required for device initialization such as DRAM and VGA.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:03 +08:00
Chia-Wei Wang
4b0129e810 timer: Add AST2700 IBEX timer support
Add the driver for the AST2700 Ibex timer, which uses CPU
cycles as the timer count running at 200MHz.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:03 +08:00
Chia-Wei Wang
9efcb10a09 riscv: Add AST2700 SoC initial platform support
AST2700 SoCs integrates a Ibex 32-bits RISC-V core as the boot MCU
for the first stage bootloader execution, namely SPL.

This patch implements the preliminary base to successfully run SPL
on this RV32-based MCU to the console banner message.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:03 +08:00
Chia-Wei Wang
717002f8ff riscv: u-boot-spl.lds: Remove _image_binary_end alignment
The _image_binary_end symbol was aligned to the 8-bytes boundary.
However, the SPL device tree (u-boot-spl.dtb) is concatenated right
after the binary (u-boot-spl-nodtb.bin) wihtout the consideration of
the 8-bytes alignment restriction.

After then, for the SPL_SEPARATE_BSS case, fdtdec_setup() searching
for the DTB by _image_binary_end will return the "Missing DTB" error.
As the real DTB starting point does not align to a 8-bytes address
like _image_binary_end does.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:03 +08:00
Chia-Wei Wang
248292f499 riscv: Make stack size shift configurable
Add prompt for STACK_SIZE_SHIFT to make it configurable.
The default value remains 14 as usual.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:03 +08:00
Chia-Wei Wang
9c0ed72142 riscv: Make A ISA extension selectable
Make the Atomic (A) ISA extension selectable. Thus CPUs such as
Ibex without the A extension can be supported.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:03 +08:00
Jacky Chou
db378b0f18 driver: net: Add Aspeed AST2700 MDIO support
The AST2700 is the 7th generation SoC from Aspeed.
And use the driver to support clause 22 access.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:34:48 +08:00
Jacky Chou
c724f3ed74 net: ftgmac100: Add Aspeed AST2700 support
Add support of Aspeed AST2700 SoC.  AST2700 is based on ARM64 so modify
the DMA address related code to fit both ARM and ARM64.  Besides, the
RMII/RGMII mode control register is moved from SCU500 to MAC50 so
initialize the register in ftgmac100_start correspondingly.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:34:43 +08:00
Jacky Chou
40c45a5797 net: ftgmac100: Modify desc. size to cache line
The TX/RX descriptor size is 16 byte.
When the cache line size is larger than 16 bytes, descriptors
flushed to RAM will flush more than one descriptor.
It is possible that it may mistakenly flush to other descriptor
that has been updated by MAC in RAM.

To avoid this issue, align the descriptors to cache line size.
Only one desc will be flushed or invalidated at a time.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:34:39 +08:00
Jacky Chou
a0f4e43c59 net: ftgmac100: Fixed NC-SI PHY device cannot get
The NC-SI interface does not need the MDIO bus and the
NC-SI PHY device cannot get from dm_eth_phy_connect.
Therefore, use phy_connect directly here.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:34:35 +08:00
Jacky Chou
21d5d5e55b net: ftgmac100: Fixed the cache coherency issues of rx memory
When executing TFTP, the ARP will be replied to after receiving
the ARP. U-boot's ARP routine modifies the data in the receive
packet in response to the ARP packet and then copies it
into the transmit packet.
At this point, the received packet cache is inconsistent.
It is possible that the cache will perform a writeback action to
affect the MAC receiving packets.

Avoid the same problem that occurs in other networking protocols.
In the free_pkt function, ensure cache and memory consistency.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:34:31 +08:00
Kongyang Liu
aa4a03f2e2 riscv: dts: sophgo: Replace device clocks with real clocks.
Replace device clocks with real clocks from the clock controller, and
remove dummy clocks.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:32:06 +08:00
Kongyang Liu
78c04aea8c configs: milkv_duo: Enable clock controller
Add configs to enable clock controller for Sophgo Milk-V Duo board

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:32:06 +08:00
Kongyang Liu
5f364e072e clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC
Add clock controller driver for sophgo cv1800b SoC

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:32:06 +08:00
Kongyang Liu
bd2f42230e dt-bindings: clk: import header for clock controller of sophgo CV1800B
Import header file of sophgo cv1800b clock controller from kernel

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Link: https://lore.kernel.org/all/IA1PR20MB4953637E7A6C121D7A700F1CBB8BA@IA1PR20MB4953.namprd20.prod.outlook.com/
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:32:06 +08:00
Tom Rini
78d898eec0 Merge patch series "phycore-am62/4: Add more boot sources"
Daniel Schultz <d.schultz@phytec.de> says:

This patch stack extends the phyCORE-AM62x/AM64x U-Boot by following boot
sources:

  - Load U-Boot with USB DFU
  - Load a Linux and initramfs from OSPI/QSPI NOR flash
  - Load a Linux and rootfs from Network

Moreover, it adds required changes to the environment to boot an A/B
system with RAUC and includes some minor fixes.
2024-09-10 14:56:12 -06:00
Daniel Schultz
ef7a3f16a2 configs: phycore_am62x_*_defconfig: Set PHYTEC as Manufacturer
Commit 371b379edbf3 ("configs: Make USB_GADGET_MANUFACTURER
consistent over all PHYTEC boards") made the USB_GADGET_MANUFACTURER
value consistent over all PHYTEC boards.

Update the phyCORE-AM62x defconfigs to make this config consistent
as well.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:02 -06:00
Daniel Schultz
1bd194f1ff configs: phycore_am62x_a53_defconfig: Fix CONFIG_ENV_SIZE
The environment should have a size of 0x20000 instead 0x2000.
Update to have the same environment size for all PHYTEC K3 products.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:02 -06:00
Daniel Schultz
4d197fab9b configs: Add phycore_am62x_r5_usbdfu_defconfig
This config includes the phycore_am62x_r5_defconfig file as well as
the am62x_r5_usbdfu.config fragment. We need another defconfig
because the AM62x has not enough internal SRAM to support all boot
sources. The normal phycore_am62x_r5_defconfig should allow to boot
from MMC and OSPI while this new defconfig allows to boot from USB.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Schultz
529ddb6053 configs: phycore_am62x_a53_defconfig: Merge am62x_a53_usbdfu.config
Merge the am62x_a53_usbdfu.config into the phyCORE-AM62x A53 defconfig to
properly support USB DFU boot.

This config was made with the following command:

    make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- \
        phycore_am62x_a53_defconfig am62x_a53_usbdfu.config

However, CONFIG_USB_GADGET_MANUFACTURER was not merged to keep Phytec
as manufacturer.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Schultz
8b4a72f513 configs: phycore_am64x_a53_defconfig: Make BOOTCMD generic
The phyCORE-AM64x board code sets an environment variable 'boot'
with the device U-Boot booted from. Use this variable in
CONFIG_BOOTCOMMAND to boot Linux from the same boot device by
default.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Schultz
9624465384 configs: phycore_am62x_a53_defconfig: Make BOOTCMD generic
The phyCORE-AM62x board code sets an environment variable 'boot'
with the device U-Boot booted from. Use this variable in
CONFIG_BOOTCOMMAND to boot Linux from the same boot device by
default.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Schultz
11b8fa0095 board: phytec: phycore_am64x: Add Network/SPI Boot
Include the boot logic to boot via Network or from a OSPI/QSPI
NOR flash. Moreover, set all required variables to both boot
methods to the environment.

Note: The phyBOARD-Electra AM64x is not able to load the U-Boot
via Network. However, it's still possible to load the kernel.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Schultz
a48cbaeecb board: phytec: phycore_am62x: Add Network/SPI Boot
Include the boot logic to boot via Network or from a OSPI/QSPI
NOR flash. Moreover, set all required variables to both boot
methods to the environment.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Schultz
92ff68b298 include: env: phytec: Add K3 boot logic for OSPI/QSPI flashes
This boot logic allows to boot a Kernel image, Device-Tree blob
and a initramfs from an external OSPI/QSPI NOR flash.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Schultz
d87842cd3d include: net: phytec: Add K3 network boot logic
This boot logic allows to boot a Kernel image, Device-Tree blob
and overlays via tftp/dhcp (configurable with 'net_fetch_cmd').
Additionally, it loads a rootfs via NFS.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Schultz
8cafb21215 include: env: phytec: Add raucinit to k3_mmc environment
Initialize the environment for booting an RAUC image when
'doraucboot' is set to 1.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Schultz
80c4f6f9f2 include: env: phytec: k3_mmc: Rename variables
Add a mmc prefix to 'loadimage' and 'loadfdt' because we need
similar variables for other boot sources. This will prevent
name clashes and allows to implement similar boot logic.

Also switch from loadaddr to kernel_addr_r.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Wadim Egorov
d0bc2ac2bd configs: phycore_am64x_a53_defconfig: Enable CONFIG_OF_BOARD_SETUP
Enable CONFIG_OF_BOARD_SETUP to fixup kernel device tree with mtd
partitions.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-09-10 13:16:01 -06:00
Daniel Palmer
c6eba28c46 spl: spl_load: fix comparison between negative error code and unsigned size
read could be a negative error value but size in spl_image is unsigned
so when they are compared read is used as if it's a unsigned value
and if it's negative it'll most likely be bigger than size and the
result will be true and _spl_load() will return 0 to the caller.

This results in the caller to _spl_load() not seeing that an error happened
as it should and continuing as if the load was completed when it might
not have been.

Check if read is negative and return it's value if it is before comparing
against size in spl_image.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-10 13:15:13 -06:00
Love Kumar
2349cc00d9 test/py: spi: Set the expected error message
If erase/write/read size is 0 then it throws the mentioned error message
when debug message ie enabled as per 899fb5aa8bec ("cmd: sf/nand: Print
and return failure when 0 length is passed"), setting it to None as
debug message is not enabled by default for testing.

Signed-off-by: Love Kumar <love.kumar@amd.com>
2024-09-10 13:15:06 -06:00
Rasmus Villemoes
52ec7b7c89 treewide: drop redundant "type string" for SYS_SOC and friends
The Kconfig symbols SYS_ARCH, SYS_CPU, SYS_SOC, SYS_VENDOR and
SYS_BOARD are defined in arch/Kconfig as having type string, and most
board files simply amend those definition with suitable

  default "foo"

or

  default "foo" if BAR

stanzas. But some also include a redundant repetition of the type.

Homogenize the code base by removing those lines.

Generated by

  find arch/*/ board -name Kconfig | xargs perl -i -g -pe 's/(config SYS_(ARCH|CPU|SOC|VENDOR|BOARD)\n)\s*string\n/\1/gs'

with the trailing slash in arch/*/ ensuring that arch/Kconfig itself
is not found.

This does not change boards which add a prompt string, e.g.

  string "Board name"

because I think those change the semantics of the symbol into being
user-settable.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-09-10 13:14:59 -06:00
Tom Rini
2def0df217 arm: Remove ethernut5 board
As per the maintainers at egnite GmbH, they are no longer interested in
supporting this board. Go and remove the platform here. Furthermore,
this is the only AT91SAM9XE platform in-tree so remove supporting code
for that as well.

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-09-10 13:12:32 -06:00
Jerome Forissier
278e9ac8aa net: guard call to tftp_start() with IS_ENABLED(CONFIG_CMD_TFTPBOOT)
net_auto_load() cannot call tftp_start() if CONFIG_CMD_TFTPBOOT is
disabled.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
2024-09-10 13:08:24 -06:00
Rasmus Villemoes
5f04493241 scripts/Makefile.lib: do not include CONFIG_DEVICE_TREE_INCLUDES in dtsi_include_list
The commit mentioned in Fixes broke the
CONFIG_DEVICE_TREE_INCLUDES feature, with the result that any board
setting any non-empty value for that fails to build.

The parent of the mentioned commit refactoring a bit by introducing
the dtsi_include_list variable and changing cmd_dtc to loop over that
was fine.

However, the .dtsi files mentioned in CONFIG_DEVICE_TREE_INCLUDES are
not supposed to be generated via the build system. They are meant for
e.g. including a public key for verified boot (generated with the
key2dtsi script), or for injecting some stuff to the /config
node (say, a bootcmd or a load-environment setting or things like
that). The files can either live in-tree in a private branch or
completely outside, e.g. in some Yocto metadata.

But regardless, U-Boot's build system will never know anything about
them, so when the mentioned commit did

dtsi_include_list_deps = $(addprefix $(obj)/,$(subst $(quote),,$(dtsi_include_list)))

things broke, because if CONFIG_DEVICE_TREE_INCLUDES is for example
"/path/to/public_key.dtsi", this would add a dependency on
$(obj)//path/to/public_key.dtsi to each $(obj)/*.dtb target, yielding

make[3]: *** No rule to make target 'arch/arm/dts/imx6dl-aristainetos2c_7.dtb', needed by 'dtbs'.  Stop.

To fix that while preserving the introduced
CONFIG_EFI_CAPSULE_ESL_FILE behaviour, disentangle
CONFIG_DEVICE_TREE_INCLUDES from dtsi_include_list from which
dtsi_include_list_deps is built, and instead just add the items
directly to the $(foreach) loop.

Fixes: a958988b62 ("scripts/Makefile.lib: Add dtsi include files as deps for building DTB")
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Emil Kronborg <emil.kronborg@protonmail.com>
2024-09-10 11:31:54 -06:00
Tom Rini
ce1a263082 Merge tag 'u-boot-dfu-20240910' of https://source.denx.de/u-boot/custodians/u-boot-dfu
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/22302

- Fix ANDROID_AB_BACKUP_OFFSET unit
2024-09-10 07:51:40 -06:00
Tom Rini
4072739170 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/22292

- Add rdcycle to RISC-V exception command
- Some fixes and refactoring
2024-09-10 07:50:05 -06:00
Tom Rini
aded8e4aae Merge tag 'u-boot-imx-master-20240909' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22289

- Fix a boot regression on i.MX8MQ.
2024-09-10 07:49:26 -06:00
Heinrich Schuchardt
1806fed0ce cmd: add rdcycle test to RISC-V exception command
Some versions of KVM don't allow access to the cycle CSR.

Provide a command 'exception rdcycle' for testing.

If the cycle CSR is accessible, we get an output like:

    => exception rdcycle
    cycle = 0x41f7563de

If the cycle CSR is not accessible, we get an output like:

    => exception rdcycle
    Unhandled exception: Illegal instruction

Put subcommands into alphabetical order in long help.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-10 10:10:43 +08:00
Heinrich Schuchardt
4a36d217bb riscv: show registers in crash dumps by default
If an exception occurs in main U-Boot, show the registers. This makes
analyzing crashes especially in external applications easier.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-10 10:10:43 +08:00
Heinrich Schuchardt
73e73f04b7 riscv: allow to enable SHOW_REGS in main U-Boot only
To minimize SPL size it is reasonable to disable SHOW_REGS. For main U-Boot
the size restrictions are much more relaxed.

* Provide separate Kconfig symbols for SPL and main U-Boot.
* Add a help text.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-10 10:10:43 +08:00