22502 Commits

Author SHA1 Message Date
Samuel Holland
1324dd23cf Attempt OF_PLATDATA
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-04 23:31:17 -05:00
Samuel Holland
60e6ee61c6 Adapt iNet U70B REV01 for development (FEL + serial)
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-03 23:19:14 -05:00
Samuel Holland
46cb60dc1c Merge branch 'patch/a33-tablet-dts' into allwinner 2022-05-02 22:04:51 -05:00
Samuel Holland
e5f615271b Merge branch 'patch/axp-gpio' into allwinner 2022-05-02 22:04:48 -05:00
Samuel Holland
98784356c5 Merge branch 'patch/axp-vbus' into allwinner 2022-05-02 22:04:46 -05:00
Samuel Holland
ed538f30f1 Merge branch 'patch/h6-dts' into allwinner 2022-05-02 22:04:18 -05:00
Samuel Holland
1f9dc313c3 Merge branch 'patch/h3-scp' into allwinner 2022-05-02 22:04:16 -05:00
Samuel Holland
8a34c8c676 Merge branch 'patch/h3-fit' into allwinner 2022-05-02 22:04:14 -05:00
Samuel Holland
f60c894698 ARM: dts: sun8i: A33: Add iNet U70B REV01
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:39 -05:00
Samuel Holland
8f23c866be gpio: axp: Bind via device tree
Now that the PMIC has a DM driver and binds device tree subnodes, the
GPIO device can be bound that way, instead of from inside board code.

Since the driver still uses the single set of register definitions from
axpXXX.h (as selected by AXPxxx_POWER), it does not differentiate among
the supported compatibles.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:32 -05:00
Samuel Holland
547074e596 ARM: dts: sunxi: Add AXP221 and AXP809 GPIO nodes
These PMICs each have two GPIO pins, and are supported by the axp_gpio
driver. In order to convert the axp_gpio driver to probe using the
device tree, the corresponding device tree nodes must be present. Add
them, following the same binding as the AXP209 and AXP813.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:32 -05:00
Samuel Holland
9ce07702d6 phy: sun4i-usb: Use DM_GPIO for id/vbus_det GPIOs
Now that the sunxi_gpio driver handles pull-up/down via the driver
model, we can switch to DM_GPIO for these pins with no loss in
functionality. Since the driver now gets its pin configuration from
the device tree, we can remove the Kconfig symbols.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:27 -05:00
Samuel Holland
50da56c12c gpio: axp/sunxi: Remove virtual VBUS enable GPIO
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove
it, along with the rest of the support for AXP virtual GPIOs.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:27 -05:00
Samuel Holland
0c97e0ae18 sunxi: Remove obsolete USBx_VBUS_PIN Kconfig symbols
Now that the USB PHY driver uses the device tree to get VBUS supply
regulators, these Kconfig symbols are unused. Remove them.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:27 -05:00
Samuel Holland
cb79741880 gpio: axp/sunxi: Remove virtual VBUS detection GPIO
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:27 -05:00
Samuel Holland
e147fbaba1 ARM: dts: sun6i: mixtile-loftq: Add USB1 VBUS regulator
This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no
regulator exists in its device tree. Add the regulator, so USB will
continue to work when the PHY driver switches to using the regulator
uclass instead of a GPIO.

Update the device tree here because it does not exist in Linux.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:26 -05:00
Samuel Holland
620af6071b sunxi: DT: H6: Add USB3 to Pine H64 DTS
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:20 -05:00
Samuel Holland
553555a995 ARM: dts: sun50i: H6: Sync from Linux v5.18-rc1
Copy the devicetree source for the H6 SoC and all existing boards
from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.

This commit also adds the following new board devicetrees:
 - sun50i-h6-pine-h64-model-b.dts
 - sun50i-h6-tanix-tx6-mini.dts

This update should not impact any existing U-Boot functionality.

Series-to: sunxi
Cover-letter:
sunxi: Devicetree sync from Linux v5.18-rc1
This series brings all of our devicetrees up to date with Linux.

Older SoCs (before A83T) have not been synchronized in over 3 years.
And I don't have any of this hardware to test. But there are not major
changes to those devicetrees either.

The big motivation for including older SoCs in this update is converting
the USB PHY driver to get its VBUS detection GPIO/regulator from the
devicetree instead of from a pin name in Kconfig. Many older boards had
those properties added or fixed since the last devicetree sync. This PHY
driver change is necessary to complete the DM_GPIO migration.

A couple of breaking changes were made to several SoCs' devicetrees in
Linux relating to the "r_intc" interrupt controller. New kernels support
old devicetrees, but not the other way around. So to be most compatible
and avoid regressions, those changes are skipped here.
END

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
ae4dacaec9 ARM: dts: sun50i: A64: Sync from Linux v5.18-rc1
Copy the devicetree source for the A64 SoC and all existing boards
from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
0166cfcfba ARM: dts: sun8i: R40/T3: Sync from Linux v5.18-rc1
Copy the devicetree for the R40/T3 SoC verbatim from the Linux v5.18-rc1
tag. None of the existing boards had any devicetree updates.

This commit adds the following new board devicetrees:
 - sun8i-r40-oka40i-c.dts
 - sun8i-t3-cqa3t-bv3.dts

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
d9f9e086d4 ARM: dts: sun8i: V3/V3s/S3: Sync from Linux v5.18-rc1
Copy the devicetree source for the V3(s)/S3 SoCs and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This commit also adds the following new board devicetrees:
 - sun8i-s3-elimo-initium.dts
 - sun8i-v3-sl631-imx179.dts

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
ddacefec8a ARM: dts: sunxi: H2+/H3/H5: Sync from Linux v5.18-rc1
Copy the devicetree source for the H2+/H3/H5 SoCs and all existing
boards from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

This commit also adds the following new board devicetree:
 - sun8i-h3-nanopi-r1.dts

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
2f88b82a06 ARM: dts: sun8i: A83T: Sync from Linux v5.18-rc1
Copy the devicetree source for the A83T SoC and all existing boards
from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

As with the other SoCs, updates of note include adding detection GPIO
properties in the USB PHY nodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
078c314c01 ARM: dts: sun9i: Sync from Linux v5.18-rc1
Copy the devicetree source for the A80 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
c79284fe6e ARM: dts: sunxi: A13/A31/A23/A33: Sync from Linux v5.18-rc1
Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16
SoCs and all existing boards from the Linux v5.18-rc1 tag.

These changes are combined into one commit due to interdependencies:
 - The unit addresses were removed from bitbanged I2C buses, which
   drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts
   and sun6i-a31-colombus.dts.
 - The pinctrl nodes were renamed, including some used by the shared
   header sunxi-reference-design-tablet.dtsi.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts
to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree.

This commit also adds the following new board devicetrees:
 - sun5i-a13-licheepi-one.dts
 - sun5i-a13-pocketbook-touch-lux-3.dts
 - sun5i-gr8-evb.dts
 - sun8i-a23-ippo-q8h-v1.2.dts
 - sun8i-a23-ippo-q8h-v5.dts
 - sun8i-a33-et-q8-v1.6.dts
 - sun8i-a33-ippo-q8h-v1.2.dts
 - sun8i-r16-nintendo-super-nes-classic.dts

As with the other SoCs, updates of note are conversion of GPIO pull-up
from pinconf to GPIO flags and renaming the detection GPIO properties in
the USB PHY nodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
8e097b9e28 ARM: dts: sun7i: Sync from Linux v5.18-rc1
Copy the devicetree source for the A20 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This commit also adds the following new board devicetrees:
 - sun7i-a20-haoyu-marsboard.dts
 - sun7i-a20-linutronix-testbox-v2.dts
 - sun7i-a20-olinuxino-lime-emmc.dts

This update includes changes to the USB PHY detection GPIO properties
which are needed to convert that driver to use the DM GPIO framework.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
1bdd474991 ARM: dts: sun4i: Sync from Linux v5.18-rc1
Copy the devicetree source for the A10 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This commit also adds the following new board devicetree:
 - sun4i-a10-topwise-a721.dts

While this update should not impact any existing U-Boot functionality,
the changes to the USB PHY detection GPIO properties are needed to
convert that driver to use the DM GPIO framework.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
25b265d496 ARM: dts: sunxi: Remove unused devicetree headers
These files are not included anywhere and do not exist in the Linux
devicetree source.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:06 -05:00
Samuel Holland
65b2650096 [DO NOT MERGE] sunxi: psci: Delegate PSCI to SCPI
This adds a new PSCI implementation which communicates with SCP firmware
running on the AR100 using the SCPI protocol. This allows it to support
the full set of PSCI v1.1 features, including CPU idle states, system
suspend, and multiple reset methods.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:02 -05:00
Samuel Holland
759624b1a7 arm: psci: Add definitions for PSCI v1.1
Add the new option, function IDs, and prototypes for PSCI v1.1
implementations. In the process, fix some issues with the existing
definitions:
 - Fix the incorrectly-named ARM_PSCI_0_2_FN64_SYSTEM_RESET2.
 - Replace the deprecated "affinity_level" naming with "power_level".

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:01 -05:00
Samuel Holland
fb10f0c240 sunxi: Enable support for SCP firmware on H3
Now that issues with the BROM have been sorted out, we can implement
PSCI system suspend on H3 by delegating to SCP firmware. Let's start by
including the firmware in the FIT image and starting the coprocessor if
valid firmware is loaded.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:01 -05:00
Samuel Holland
b9225c91aa arm: dts: sunxi: h3: Add nodes for AR100 remoteproc
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:01 -05:00
Samuel Holland
e061896f94 sunxi: psci: Add support for H3 CPU 0 hotplug
Due to a bug in the H3 SoC, where the CPU 0 hotplug flag cannot be
written, resuming CPU 0 requires using the "Super Standby" code path in
the BROM instead of the hotplug path. This path requires jumping to an
eGON image in SRAM.

Add support to the build system to generate this eGON image and include
it in the FIT, and add code to direct the BROM to its location in SRAM.

Since the Super Standby code path in the BROM initializes the CPU and
AHB1 clocks to 24 MHz, those registers need to be restored after control
passes back to U-Boot. Furthermore, because the BROM lowers the AHB1
clock divider to /1 before switching to the lower-frequency parent,
PLL_PERIPH0 must be bypassed to prevent AHB1 from temporarily running at
600 MHz. Otherwise, this locks up the SoC.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:01 -05:00
Samuel Holland
31b6be2e34 sunxi: psci: Avoid hanging when CPU 0 is hot-unplugged
Do not try to send an SGI from CPU 0 to itself. Since FIQs are masked
when entering monitor mode, this will hang. Plus, CPU 0 cannot fully
power itself off anyway. Instead, have it turn FIQs back on and continue
servicing SGIs from other cores.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:03:01 -05:00
Samuel Holland
d33092dfbe sunxi: binman: Enable SPL FIT loading for 32-bit SoCs
Now that Crust (SCP firmware) has support for H3, we need a FIT image to
load it. H3 also needs to load a SoC-specific eGon blob to support CPU 0
hotplug. Let's first enable FIT support before adding extra firmware.

Update the binman description to work on either 32-bit or 64-bit SoCs:
 - Make BL31 optional, since it is not used on 32-bit SoCs (though BL32
   may be used in the future).
 - Explicitly set the minimum offset of the FIT to 32 KiB, since SPL on
   some boards is still only 24 KiB large even with FIT support enabled.
   CONFIG_SPL_PAD_TO cannot be used because it is not defined for H616.

FIT unlocks more features (signatures, multiple DTBs, etc.), so enable
it by default. A10 (sun4i) only has 24 KiB of SRAM A1, so it needs
SPL_FIT_IMAGE_TINY. For simplicity, enable that option everywhere.

Cover-letter:
sunxi: SPL FIT support for 32-bit sunxi SoCs
This series makes the necessary changes so 32-bit sunxi SoCs can load
additional device trees or firmware from SPL along with U-Boot proper.

There was no existing binman entry property that put the FIT at the
right offset. The minimum offset is 32k, but this matches neither the
SPL size (which is no more than 24k on some SoCs) nor the FIT alignment
(which is 512 bytes in practice due to SPL size constraints). So instead
of adding a new property, I fixed what is arguably a bug in the offset
property -- though this strategy will not work if someone is
intentionally creating overlapping entries.
END
Series-to: sunxi
Series-to: sjg
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-02 22:02:58 -05:00
Tom Rini
8b2b125e95 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
fsl-qoriq: Fixes and updates on fsl-layerscape
mpc85xx: fixes and code cleanup
2022-04-27 09:19:41 -04:00
Tom Rini
24df831cd4 - Add AXG support for SARADC, including minimal ao-clk driver
- Update Amlogic documentation for Matrix & Jethub D1
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Merge tag 'u-boot-amlogic-20220427' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- Add AXG support for SARADC, including minimal ao-clk driver
- Update Amlogic documentation for Matrix & Jethub D1
2022-04-27 09:19:17 -04:00
Pali Rohár
95f8dfe8fb pci: fsl: Change compatible string for mpc8548 to "fsl, mpc8548-pcie"
Upstream Linux kernel uses for mpc8548-based PCIe controllers compatible
string "fsl,mpc8548-pcie". So change U-Boot fsl PCIe driver and all DTS
files to use "fsl,mpc8548-pcie" instead of "fsl,pcie-mpc8548" to be
compatible with Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
e8c9148bc9 powerpc: dts: p2020: Set dfsrr property for i2c nodes
Linux kernel dts files pq3-i2c-*.dtsi also sets this dfsrr property for i2c
nodes.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
fd3dc72945 powerpc: dts: p2020: Define L2 cache node
Copy definition of L2 cache node from upstream Linux kernel P2020 dts files.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
787d2c024b powerpc: dts: p2020: Make usb@22000 node compatible for Linux kernel driver
Linux P2020 USB kernel driver uses compatible string fsl-usb2-dr-v1.6 and
needs more DT properties. Copy P2020 usb@22000 properties from upstream
Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
7b074129ad powerpc: dts: p2020: Add missing interrupts property to spi@7000 node
interrupts property for spi@7000 node is needed for compatibility with
Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
15d086ded9 powerpc: dts: p2020: Do not automatically disable spi@7000 node in p2020-post.dtsi
Device tree include file p2020-post.dtsi should be included after the board
device tree file and overrides settings of the board. So it should not
disable some node as board cannot enable it via normal way (it has to
enable it after inclusion of p2020-post.dtsi file).

Fix it by removal of explicit disable in p2020-post.dtsi file and then
remove explicit post-post enable in all P2020 board device tree files.
Currently no P2020 board has spi@7000 node disabled.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
d1721ea6d9 powerpc: dts: p2020: Add Linux compatible string and property for eSDHC
Linux kernel eSDHC driver for P2020 requires additional compatible string
fsl,p2020-esdhc and interrupts property. Add them to p2020-post.dtsi file
to make U-Boot board DTS files compatible for Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
0e33f68b23 powerpc: dts: p2020: Add ptp_clock@24e00 node via pq3-etsec1-timer-0.dtsi
Import pq3-etsec1-timer-0.dtsi device tree include file from upstream Linux
kernel for P2020. This allows U-Boot to use P2020 device tree files from
upstream Linux kernel which reference ptp_clock@24e00 device.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
1a0800ac40 powerpc: dts: p2020: Make PCIe nodes compatible for Linux kernel driver
Linux P2020 PCIe kernel driver uses compatible string fsl,mpc8548-pcie and
needs more DT properties. Copy P2020 PCIe nodes and definitions from
upstream Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
ec52b55b93 powerpc: dts: p2020: Add gpio-controller@fc00 node via pq3-gpio-0.dtsi
Import pq3-gpio-0.dtsi device tree include file from upstream Linux kernel
for P2020. This allows U-Boot to use P2020 device tree files from upstream
Linux kernel which reference gpio-controller@fc00 device.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
1245c6e258 powerpc: mpc85xx: Define linker sections in ascending order
It is too confusing if sections are defined in non-ascending order.

Also linker has to go backward and then again forward when generating final
binary.

To make future changes easier, define all linker sections in ascending
order.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
1b780b654f powerpc: mpc85xx: Put bss after image when not including reset vector
Linker knows exact size of the image, so there is no need to use
CONFIG_SYS_MONITOR_LEN macro (which should be upper limit).

Remove usage of CONFIG_SYS_MONITOR_LEN macro to simplify setup.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
c45f000f29 powerpc: mpc85xx: Remove useless SIZEOF_HEADERS and .interp from ld script
.interp section is not available in output ELF binary and SIZEOF_HEADERS is
needed at all.

There is no change in generated u-boot.bin binary.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30