Jonathan Humphreys <j-humphreys@ti.com> says:
Enable on disk capsule updates, which includes defining the firmware
components (tiboot3, spl, u-boot) and enabling processing of raw capsule
updates.
This is enabled for several TI SoC based platforms: AM64, AM62, AM62p,
AM69, BeaglePlay, J7, and BeagleboneAI. The configs to enable this are in a
single base config file. This will make it more scalable to add additional
EFI capsule features (like authentication) across all TI boards that have
capsules enabled.
This series also includes enabling serial flash DFU for AM62 and MMC DFU
for beagleplay.
Added OSPI NOR flash layout diagram, as well as example commands to flash
firmware to it. Added OSPI boot mode pin setting.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM69
SK.
TODO: possibly make the struct's sk specific.
TODO: add doc commit (and make sure doc is sk/NOR specific, and add OSIP
boot mode)
TODO: update doc to show sk defconfig when building
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the
BeagleBoneAI64.
Note this involved creating BeagleBoneAI64's own beagleboneai64.h board
header file instead of reusing j721e_evm's.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM62px
SK.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM62x
SK.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the
BeaglePlay.
Note this involved creating BeaglePlay's own beagleplay.h board header file
instead of reusing am62_evm's.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the
SK-TDA4VM.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM64x
SK.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
To better scale with the number of boards, separate TI K3 EFI capsule
configs into its own file that can be shared across TI K3 boards. This
will allow any platform level config changes to be done once.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Few cosmetic fixes for clarity and spelling mistakes.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Created a capsule update porting section in the documentation that outlines
the steps a board developer must do when porting from an existing reference
board implementation.
In particular, added a big warning that new capsule GUID's need to be
defined.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
If SYSINFO support isn't enabled, it's a given that uclass_first_device
for UCLASS_SYSINFO will not find anything, therefore let's skip the test
entirely.
This allows to get rid of the following debug message that may be
confusing:
Cannot find uclass for id 118: please add the UCLASS_DRIVER() declaration for this UCLASS_... id
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wadim Egorov <w.egorov@phytec.de> says:
It includes various fixes and improvements for phyCORE-AM62x and
phyCORE-AM64x SoMs. Notable is the last patch which prepares for use
with future ECC memory fixups.
There is no need to reread the EEPROM multiple times in different stages
to detect the RAM size. We can do this once at an early stage and let
higher stages decode memory nodes using fdtdec.
Make sure to pass fixup memory nodes before passing to u-boot stage.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Update Flash to SPI NOR chapter for use with mtd commands.
This is more convenient as we do not have to remember any
offsets in the SPI.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Enable mtd command and remove SPI NOR flashes we do not
populate on our SoMs.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Pull in ti/k3_dfu.env for dfu_alt_info_ram in SPL stage.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Enable configs required for booting via DFU.
Configs taken from the am62x_a53_usbdfu.config config fragment.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Update environment location to align with OSPI fixed-partition
definitions and provide a redundant environment at a 2nd location.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Update environment location to align with OSPI fixed-partition
definitions and provide a redundant environment at a 2nd location.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Copy fixed-partitions nodes from U-Boot device tree to OS device tree.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Add a fixed partitions node to the AM64x device tree so that it can
be used to fixup the Linux device tree.
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Add a fixed partitions node to the AM62x device tree so that it can
be used to fixup the Linux device tree.
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
------------
_ Reserve OPTEE area in EFI memory map
_ net: dwc_eth_qos: add support for phy-reset-gpios property
_ Add eth1/2 support for stm32mp13
_ Add PWR regulator support for stm32mp13
_ Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board
_ Add support for STM32MP13xx DHCOR SoM and DHSBC board
_ Set PLL4_P to 125Mhz for ETH_CLK for stm32mp157c-odyssey
_ Use internal clock for Tx for stm32mp157c-odyssey
_ Fix incorrect PHY address for stm32mp157c-odyssey
_ Add phy-reset-gpios property to ethernet node for stm32mp157c-odyssey
_ Add generic SoM compatible to STM32MP15xx DH electronics DHSOM
_ Auto-detect second MAC on STM32MP15xx DH electronics DHCOM
-----BEGIN PGP SIGNATURE-----
iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmZxMkMcHHBhdHJpY2Uu
Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/pkt2D/9uOTIBoGBfF5p4ZLDL
CuEjWT9HPGfRwoDK+b31NI6MDl34tWOqNcykK3ePucLzcNVxlxQN6jND0hTISksG
xpL7KhqWJNmi4joanIdQCHjMjLP0Lo9X7TzjJhG2rwkJQ0Z5nP2OZhxlGoZH+tyM
funpVh8OanAmgPXMl7iUgz9mzALXfavPedXCksFouuPLl+2s7W3ACPuokzTfJf9R
a6befEN1EEgNYrJda21rw8rchhGbX93bjcBngrgZvHCxjHveUgDXDJHQyRxtEV3Y
qgmLeE0WYd5YmDWNt9fbW89OQt1iGNM6DaDl99kqF3dDy1mPXnF6G5APy2al2KN8
IdAp30Hy4CQ1nCjPjfl/789rFQeCJwTzBE6+28PnBaJ/2i4CwwJiRPrsEn0EJVdV
0WPePQJvLDBYB9qg+tBpZhERIHMEwKL7oBQRKGXDnT7/wJ3a8qiImQ9JfYp3a7pB
wyYviripadyYfcdz6H6RaqjW736/NbRnu8zUN8GT34AOroeYxtq044zDHTMlp6ft
WjcKcvjofWR5eL8a7AfbS2Jm/MCGBSU98/HSZEZHfA+Ky8QUtiMWugERjOH76BpT
1b/JeRkD62oABHfOSY4ptyDAldkQiqjQfsmEfK40EtKg6J1OuRt8JCCxt44bTzam
oreRZTn4/zR79AJWYugdLpKMpA==
=tW2d
-----END PGP SIGNATURE-----
Merge tag 'u-boot-stm32-20240618' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
STM32MP15/13
------------
_ Reserve OPTEE area in EFI memory map
_ net: dwc_eth_qos: add support for phy-reset-gpios property
_ Add eth1/2 support for stm32mp13
_ Add PWR regulator support for stm32mp13
_ Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board
_ Add support for STM32MP13xx DHCOR SoM and DHSBC board
_ Set PLL4_P to 125Mhz for ETH_CLK for stm32mp157c-odyssey
_ Use internal clock for Tx for stm32mp157c-odyssey
_ Fix incorrect PHY address for stm32mp157c-odyssey
_ Add phy-reset-gpios property to ethernet node for stm32mp157c-odyssey
_ Add generic SoM compatible to STM32MP15xx DH electronics DHSOM
_ Auto-detect second MAC on STM32MP15xx DH electronics DHCOM
Test whether this system is compatible with STM32MP15xx DHCOM SoM,
if so, test whether R292 pull up is populated on pin PC3, which is
an indication that the second MAC chip, KS8851-16MLL, is populated.
Use this information to patch 'status' DT property into the second
ethernet MAC DT node and enable/disable the MAC on systems where
the chip is/isn't populated respectively.
Use spl_perform_fixups() to patch the U-Boot proper DT from SPL and
ft_board_setup() to patch Linux DT from U-Boot proper. This way both
software components are configured the same way.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add generic SoM compatible string into machine compatible string
for all STM32MP15xx based DH electronics DHSOM. This way, common
board code can match on this compatible. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In Odyssey board, we should reset the PHY chipset, toggling G0 pin.
Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In Odyssey board, KSZ9031 is at the PHY address 0x7, not 0x0. This
commit fixes it.
Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In Odyssey board, we should use the internal clock from RCC as the
transmit clock, instead of the external clock from ETH_CLK125 pad. This
commit adds a property, st,eth-clk-sel, so that the ETH_CLK_SEL mux
selects ETH_CLK.
Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Odyssey board requires ETH_CLK of 125Mhz. This commit sets PLL4_P/Q/R to
125, 62.5 and 62.5Mhz in respectively.
Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This stm32mp135f-dhcor-dhsbc board is a stack of DHCOR SoM based on
STM32MP135F SoC (900MHz / crypto capabilities) populated on DHSBC
carrier board.
The SoM contains the following peripherals:
- STPMIC (power delivery)
- 512MB DDR3L memory
- eMMC and SDIO WiFi module
The DHSBC carrier board contains the following peripherals:
- Two RGMII Ethernet ports
- USB-A Host port, USB-C peripheral port, USB-C power supply plug
- Expansion connector
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
