93472 Commits

Author SHA1 Message Date
Yannic Moog
518c40dfa0 arm: imx8mp-phycore: move to OF_UPSTREAM
The PHYCORE_IMX8MP is used by the phyBOARD-Pollux. Migrate board to
OF_UPSTREAM. Linux kernel device tree for the board can be used as is,
corresponding U-Boot device tree files are removed. U-Boot tweaks are
kept unchanged.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Teresa Remmet <t.remmet@phytec.de>
2024-06-03 12:13:41 -03:00
Yannic Moog
c16aa668fd arm: imx8mm-phycore: move to OF_UPSTREAM
The PHYCORE_IMX8MM is used by the phyBOARD-Polis and the
phyGATE-Tauri-L. Migrate both boards to OF_UPSTREAM. Linux kernel device
trees for both boards can be used as is, corresponding U-Boot device
tree files are removed. U-Boot tweaks are kept unchanged.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Teresa Remmet <t.remmet@phytec.de>
2024-06-03 12:13:41 -03:00
Emanuele Ghidoli
a4e37613bd toradex: tdx-cfg-block: add verdin i.mx8m mini 0090 pid4
Add new PID4 0090 Verdin iMX8M Mini Quad 4GB WB ET to support
the new hardware variant.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
2024-06-03 12:13:22 -03:00
Emanuele Ghidoli
ce53f46f33 toradex: tdx-cfg-block: add verdin imx95 sku 0089 pid4
Add new PID4 0089 Verdin iMX95 Hexa 16GB WB IT to config block handling.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
2024-06-03 12:13:22 -03:00
Emanuele Ghidoli
76a24b0f10 toradex: tdx-cfg-block: add aquila am69 sku 0088 pid4
Add new PID4 0088 Aquila AM69 Octa 32GB WB IT to config block handling.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
2024-06-03 12:13:22 -03:00
Emanuele Ghidoli
2884e5df69 board: toradex: verdin-imx8mm: increase maximum addressable ram to 4GB
Add support for SKUs with higher memory sizes.
Actual memory size is auto-detected.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
2024-06-03 12:13:22 -03:00
Emanuele Ghidoli
3ca48ec85d board: toradex: verdin-imx8mm: add 4 GB lpddr4 memory support
Add support for MT53E512M32D1ZW-046 IT:C memory.
This 4 GB memory has 17 row bits instead of 16 and requires 380 ns of
tRFC (tRFCab) instead of 280 ns due to increased channel density to 16 Gb.
Both modifications are retro-compatible with previous memories.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
2024-06-03 12:13:22 -03:00
Marek Vasut
63da3a795e ARM: dts: renesas: Drop R8A779H0 V4M DTs with OF_UPSTREAM counterparts
Remove R8A779H0 V4M DTs which are now replaced by OF_UPSTREAM counterparts.
No functional change expected.

This patch finalizes OF_UPSTREAM conversion of R8A779H0 V4M which DTs landed
in Linux 6.9 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
2024-06-02 02:30:13 +02:00
Marek Vasut
56f668e25e ARM: dts: renesas: Switch to using upstream DT on Renesas R8A779H0 V4M
Enable OF_UPSTREAM to use upstream DT and add renesas/ prefix to the
DEFAULT_DEVICE_TREE. And thereby directly build DTB from dts/upstream/src/
including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory.

This patch finalizes OF_UPSTREAM conversion of R8A779H0 V4M which DTs
landed in Linux 6.9 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
2024-06-02 02:30:13 +02:00
Adam Ford
ecfa301911 configs: rzg2_beacon: Realign ENV location and offset
The ENV size and offset were changed to different
values in Beacon's downstream release.  Change them to the
same values as the downstream for consistent behavior.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-06-02 02:30:01 +02:00
Adam Ford
7ab8406c49 renesas: beacon-rzg2m: Add Marek to MAINTAINER file
Since any changes to the RZ/G2 family go through Marek's tree,
update the MAINTAINER file to automatically show his name
when running get_maintainer.pl.  Without this, he is not
copied.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-06-02 02:30:01 +02:00
Marek Vasut
f34c5cd11b ARM: dts: renesas: Reserve space in 64bit R-Car DTs
Reserve 4 kiB of space in 64bit R-Car DTs when those DTs are compiled
to permit patching in OpTee-OS /firmware node, /reserved-memory node,
possibly also additional /memory@ nodes and RPC node by TFA.

This duplicates behavior in arch/arm/dts/Makefile with OF_UPSTREAM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-06-01 21:52:19 +02:00
Marek Vasut
7764f147f9 ARM: dts: renesas: Remove leftovers after OF_UPSTREAM conversion
Remove leftover DTSI files after OF_UPSTREAM conversion.
Those are no longer used and no longer necessary, remove them.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Adam Ford <aford173@gmail.com>
2024-06-01 21:52:07 +02:00
Tom Rini
c2d15c4b79 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- board: fix support for icicle
- board: support Star64 board
- andes: minor fixes
- riscv: deprecate cache enablement in start.S
2024-05-30 07:23:30 -06:00
Tom Rini
b1d2af984f Merge patch series "omap3: igep0x00: Fix boot failure and modernize the boards support"
Javier Martinez Canillas <javier@dowhile0.org> says:

Hello,

I noticed that the IGEPv2 board did not boot anymore with mainline U-Boot.
This was caused by a driver change to allocate its platform data before
relocation and U-Boot not having enough pre-relocation heap size for this.

This series fixes this issue and also makes the board support more modern,
by enabling DM for SPL and migrating the IGEP boards to use upstream DTBs.
2024-05-30 07:07:51 -06:00
Javier Martinez Canillas
c0c173d813 omap3: igep0x00: Migrate to use upstream DT
Enable OF_UPSTREAM to use upstream DT and add a ti/omap/ prefix to the
DEFAULT_DEVICE_TREE config option.

That way, a DTS from the upstream dts/upstream/src/ directory is used
instead of the arch/$(ARCH)/dts/ directory. These in turn are removed.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
2024-05-30 07:07:44 -06:00
Javier Martinez Canillas
261bb9c4fa omap3: igep0x00: Update for DM SPL support
This change is heavily based on commit e0cc7df9fdf2 ("omap3_beagle: Update
for DM SPL support"), that did the same update for the OMAP3 Beagle board.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
2024-05-30 07:07:44 -06:00
Javier Martinez Canillas
2c35704d97 omap3: igep0x00: Drop unused SPI support
There are no SPI peripherals in neither the IGEPv2 board nor the IGEP COM
Module, so there's no reason to have this enabled in the boards defconfig.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
2024-05-30 07:07:44 -06:00
Javier Martinez Canillas
690a214b8a omap3: igep00x0: Increase malloc() pool size
The IGEPv2 board boot started to fail since the commit afd4f15a39de ("spi:
omap3_spi: Read platform data in ofdata_to_platdata()"). Because this made
the OMAP3 SPI controller driver to allocate its platform data before doing
a relocation, but the igep0x00 config sets this pool size to just 1 KiB.

Increase the pre-relocation malloc heap size to 16 KiB, as is set by other
OMAP3 boards. This not only restores booting but also makes it consistent.

Leave the SPL pool size to the previous 1 KiB size since 16 KiB may not be
a possible size in that constrained environment and is also the value that
is set by other OMAP3 boards.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
2024-05-30 07:07:44 -06:00
Leo Yu-Chi Liang
1d29c718b7 andes: Use UCCTLCOMMAND instead of MCCTLCOMMAND
Use CSR_UCCTLCOMMAND instead of CSR_MCCTLCOMMAND
to do cache flush operation in M-mode and S-mode.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-05-30 16:01:13 +08:00
Leo Yu-Chi Liang
cea0ed2e3f riscv: remove cache enablement in start.S
Cache could be enabled in harts_early_init board-specific hook,
so remove cache enablement in start.S

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-05-30 16:01:09 +08:00
Leo Yu-Chi Liang
ceec476114 andes: l2 cache driver: fixes typos and cctl status
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-05-30 16:01:06 +08:00
H Bell
a0dce09222 board: starfive: support Pine64 Star64 board
Add documentation files

Signed-off-by: Henry Bell <dmoo_dv@protonmail.com>
Cc: ycliang@andestech.com
Cc: heinrich.schuchardt@canonical.com
Reviewed-by: E Shattow <lucent@gmail.com>
2024-05-30 16:01:00 +08:00
H Bell
7ebf7e77c0 board: starfive: support Pine64 Star64 board
Similar to the Milk-V Mars, The Star64 board contains few differences to the
VisionFive 2 boards, so can be part of the same U-boot build.

Signed-off-by: Henry Bell <dmoo_dv@protonmail.com>
Cc: ycliang@andestech.com
Cc: heinrich.schuchardt@canonical.com
Reviewed-by: E Shattow <lucent@gmail.com>
2024-05-30 16:01:00 +08:00
Conor Dooley
684775fec9 board: microchip: icicle: make both ethernets optional
A given AMP configuration for a board may make either one, or neither
of, the ethernet ports available to U-Boot. The Icicle's init code will
fail if mac1 is not present, so move it to the optional approach taken
for mac0.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-05-30 16:00:52 +08:00
Conor Dooley
d4573c05cb board: microchip: icicle: correct type for node offset
Node offsets returned by libfdt can contain negative error numbers, so
the variable type should be "int". As things stand, if the ethernet
nodes are not found in the early init callback, the if (node < 0) tests
pass and the code errors out while trying to set the local-mac-address
for a non-existent node.

Fixes: 64413e1b7c ("riscv: Add Microchip MPFS Icicle Kit support")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-05-30 16:00:52 +08:00
Tom Rini
ea722aa5eb Merge branch '2024-05-29-assorted-small-fixes'
- A few maintainer updates, bump a python package version, TI K3-AM62P
  fix
2024-05-29 11:21:14 -06:00
Kristian Amlie
f8352a8ead Update maintainer for Versatile Express.
Signed-off-by: Kristian Amlie <kristian.amlie@northern.tech>
2024-05-29 11:21:14 -06:00
Quentin Schulz
efc3f36cd2 rockchip: theobroma: update URLs to point to CHERRY website
Most of the current URLs should be redirected but some aren't already,
so let's anticipate more IT hiccups by migrating to new URLs.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-05-29 11:21:14 -06:00
Quentin Schulz
feb04cd57c migrate Theobroma Systems mail addresses to CHERRY Embedded Solutions
See
https://embedded.cherry.de/theobroma-systems-is-now-officially-part-of-cherry-se/

While the mail addresses on the theobroma-systems.com domain should be
redirect to cherry.de, let's anticipate IT hiccups and avoid important
mails not reaching us by swapping the domain name wherever appropriate
for the newer one.

Christoph Mueller isn't working at ~Theobroma~ CHERRY Embedded Solutions
anymore, but I don't know his new mail address so mails destined to him
will keep bouncing.

Cc: Heiko Stuebner <heiko.stuebner@cherry.de> <heiko.stuebner@theobroma-systems.com>
Cc: Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de>
Cc: Klaus Goger <klaus.goger@cherry.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-05-29 11:21:14 -06:00
Quentin Schulz
577933be77 .mailmap: redirect Philipp Tomsich Theobroma address to Vrull
The Theobroma address bounces as Philipp is not working there anymore,
so let's update with the one that seems to be working right now.

Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-05-29 11:21:14 -06:00
Bryan Brattlof
44b1d2210f arm: mach-k3: am62p: Fixup TF-A/OP-TEE reserved-memory node in FDT
The address we load TFA and OPTEE is configurable by the
CONFIG_K3_{ATF,OPTEE)_LOAD_ADDR, but the DT node reservations remain
static which can cause some confusion about where exactly these firmware
are exactly. Fix this by updating the reserved-memory{} nodes when the
loaded address does not match the address in DT.

Reported-by: Andrew Davis <afd@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
2024-05-29 11:21:14 -06:00
Francesco Dolcini
480b2d14ce board: toradex: change maintainer to Francesco
Marcel is leaving Toradex and the email will start bouncing in a few
weeks, move maintainership to myself.

Cc: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2024-05-29 11:21:14 -06:00
Sam Protsenko
7045c4dd04 arm: exynos: Map iRAM APM area for Exynos850 SoC
This iRAM APM area is needed for I3C access to PMIC via APM block.
Without this mapping any access to APM iRAM leads to "Synchronous Abort"
exception.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-05-28 11:54:07 +09:00
Sam Protsenko
11b9219d5a arm: dts: e850-96: Remove not needed bootph-all flags
Most of the nodes in e850-96 appended device tree that add bootph-all
flags are not necessary. All those nodes are instantiated as
dependencies of other nodes anyway. Remove those nodes to avoid
cluttering the appended dts. 'bdinfo' reports 768 bytes reduction for
"Early malloc usage", and 'dm tree' output doesn't change. Keep only
pmu_system_controller changes, which are actually needed for serial to
work properly.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-05-28 11:53:24 +09:00
Sam Protsenko
88c5d76d51 arm: exynos: Migrate E850-96 board to OF_UPSTREAM
Use upstream device tree files and bindings. To do so:
 - imply (enable) OF_UPSTREAM option for E850-96 target
 - point DEFAULT_DEVICE_TREE in E850-96 config to upstream dts
 - remove now not needed local dts files, binding docs and headers
 - update MAINTAINERS and board/samsung/e850-96/MAINTAINERS
   correspondingly

Upstream device tree files for Exynos850 SoC and E850-96 board are
pretty much the same as local (removed) ones, so the conversion is
rather straightforward and painless in this case. The appended dts file
(arch/arm/dts/exynos850-e850-96-u-boot.dtsi) stays unchanged.

The only remaining local dt-bindings doc for E850-96 board is
exynos-pmu.yaml. It wasn't removed as it's quite different from Linux
kernel version. Particularly U-Boot local version of exynos-pmu.yaml
describes "samsung,uart-debug-1" property, which is not present in Linux
kernel binding. Later it might be upstreamed to Linux kernel, and once
it's done the U-Boot exynos-pmu.yaml binding can be removed.

No functional change.

Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-05-28 11:45:09 +09:00
Tom Rini
46ff00bea5 TPM fixes
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Merge tag 'tpm-master-27052024' of https://source.denx.de/u-boot/custodians/u-boot-tpm

TPM fixes
2024-05-27 08:56:02 -06:00
Tim Harvey
89aa8463cd tpm-v2: allow algorithm name to be configured for pcr_read and pcr_extend
For pcr_read and pcr_extend commands allow the digest algorithm to be
specified by an additional argument. If not specified it will default to
SHA256 for backwards compatibility.

Additionally update test_tpm2.py for the changes in output in pcr_read
which now shows the algo and algo length in the output.

A follow-on to this could be to extend all PCR banks with the detected
algo when the <digest_algo> argument is 'auto'.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-05-27 09:00:27 +03:00
Tim Harvey
954b95e77e tpm-v2: add support for mapping algorithm names to algos
replace tpm2_supported_algorithms with an array of structures
relating algorithm names, to TCG id's, digest length and mask values.

While at it fix the tpm2_algorithm_to_mask to return the proper value.

Cc: Eddie James <eajames@linux.ibm.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Fixes: 97707f12fdab ("tpm: Support boot measurements")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-05-27 09:00:07 +03:00
Tim Harvey
57c601cd7b tpm: display warning if using gpio reset with TPM
Instead of displaying what looks like an error message if a
gpio-reset dt prop is missing for a TPM display a warning that
having a gpio reset on a TPM should not be used for a secure production
device.

TCG TIS spec [1] says:
"The TPM_Init (LRESET#/SPI_RST#) signal MUST be connected to the
platform CPU Reset signal such that it complies with the requirements
specified in section 1.2.7 HOST Platform Reset in the PC Client
Implementation Specification for Conventional BIOS."

The reasoning is that you should not be able to toggle a GPIO and reset
the TPM without resetting the CPU as well because if an attacker can
break into your OS via an OS level security flaw they can then reset the
TPM via GPIO and replay the measurements required to unseal keys
that you have otherwise protected.

Additionally restructure the code for improved readability allowing for
removal of the init label.

Before:
 - board with no reset gpio
u-boot=> tpm init && tpm info
tpm_tis_spi_probe: missing reset GPIO
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
 - board with a reset gpio
u-boot=> tpm init && tpm info
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]

After:
 - board with no reset gpio
u-boot=> tpm init && tpm info
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
 - board with a reset gpio
u-boot=> tpm init && tpm info
tpm@1: TPM gpio reset should not be used on secure production devices
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]

[1] https://trustedcomputinggroup.org/wp-content/uploads/TCG_PCClientTPMInterfaceSpecification_TIS__1-3_27_03212013.pdf

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-05-27 08:58:25 +03:00
Tom Rini
6c012d6a2f Merge tag 'u-boot-rockchip-20240525' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/20844

- new board: rk3566 Powkiddy X55, rk3588s Indiedroid Nova;
- rv1126 migrate to OF_UPSTREAM;
- Fix for px30 ringneck board;
- Fix for rk3588 SPLL clock init;
2024-05-25 08:01:20 -06:00
Chris Morgan
5c7caa9598 board: rockchip: Add Indiedroid Nova
The Indiedroid Nova is a Rockchip RK3588S based SBC from Indiedroid.

Specifications:

    Rockchip RK3588S SoC
    4x ARM Cortex-A76, 4x ARM Cortex-A55
    4/8/16GB memory LPDDR4x
    Mali G610MC4 GPU
    Optional eMMC
    2x USB 2.0, 2x USB 3.0, 1x USB 3.0 C port with DP Alt
    1x MIPI-CSI Port (4-lane or 2x 2-lane)
    1x MIPI-DSI 4-lane connector
    1x Micro HDMI 2.1 output, 1x DP 1.4 output
    Gigabit Ethernet
    Realtek RTL8821CS WiFi
    4 pin debug UART connector
    40 pin GPIO header
    Size: 85mm x 56mm (Raspberry Pi Form Factor)

Kernel commit:
3900160e164b ("arm64: dts: rockchip: Add Indiedroid Nova board")

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-25 10:28:19 +08:00
Chris Morgan
2c04d6ede4 board: rockchip: add Powkiddy X55
The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device.
UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this
successfully boots mainline Linux.

Kernel commit:
e99adc97e21a ("arm64: dts: rockchip: Add Powkiddy X55")

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-25 10:28:05 +08:00
Tom Rini
7e52d6ccfb Merge patch series "FWU: Add support for FWU metadata version 2"
Sughosh Ganu <sughosh.ganu@linaro.org> says:

The following patch series adds support for version 2 of the FWU
metadata. The version 2 metadata structure is defined in the latest
revision of the FWU specification [1].

The earlier versions of these patches were migrating to a version 2
only support in U-Boot, similar to TF-A. However, based on feedback
from ST [2], this series has been updated to support both versions. A
platform would still be needed to enable one of the two versions of
metadata through a config symbol.

TF-A has code which reads the FWU metadata and boots the platform from
the active partition. TF-A has decided to migrate the FWU code to a
version 2 only support. These changes have been merged in upstream
TF-A.

These changes have been tested on the ST DK2 board, which uses the GPT
based partitioning scheme. Both V1 and V2 metadata versions have been
tested on the DK2 board.

These changes need to be tested on platforms with MTD partitioned
storage devices.
2024-05-24 13:42:07 -06:00
Sughosh Ganu
e32c15d604 configs: fwu: re-enable FWU configs
Now that support for FWU metadata version 2 has been added, the
feature can be enabled on platforms which had enabled it. A new config
symbol for selecting the metadata version for the platform is also
being added.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
2024-05-24 13:40:04 -06:00
Sughosh Ganu
7b98f1e617 MAINTAINERS: add entry for FWU multi bank update feature
Add an entry for the FWU Multi Bank Update feature.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
2024-05-24 13:40:04 -06:00
Sughosh Ganu
7ef8436970 doc: fwu: make changes to reflect support for FWU metadata v2
The FWU Update Agent in U-Boot supports both versions of the FWU
metadata. Make changes in the documentation to reflect this.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
2024-05-24 13:40:04 -06:00
Sughosh Ganu
cdc4b46502 test: fwu: make changes to the FWU metadata access test
Make changes to the FWU metadata access tests corresponding to the
changes in the FWU metadata access code.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
2024-05-24 13:40:04 -06:00
Sughosh Ganu
cb9ae40a16 tools: mkfwumdata: add logic to append vendor data to the FWU metadata
The version 2 of the FWU metadata allows for appending opaque vendor
specific data to the metadata structure. Add support for appending
this data to the metadata. The vendor specific data needs to be
provided through a file, passed through a command-line parameter. Make
corresponding changes to the tool's manpage.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
2024-05-24 13:40:04 -06:00
Sughosh Ganu
df42d68496 tools: mkfwumdata: add support for metadata version 2
Add support for generating the FWU metadata version 2. The tool now
requires the version to be provided as a command-line option. Make
corresponding changes to the tool's manpage.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
2024-05-24 13:40:04 -06:00