27339 Commits

Author SHA1 Message Date
Tom Rini
f4e8711965 Merge patch series "Select CONFIG_64BIT for sandbox64 and x86_64"
Andrew Goodbody <andrew.goodbody@linaro.org> says:

Picking up a series from Dan Carpenter and applying requested
changes for v2.

I had previously set CONFIG_64BIT for arm64.  This patchset does the
same thing for sandbox and x86_64.  (Mips and riscv were already
doing it).  This CONFIG option is used in the Makefile to determine
if it's a 32 or 64 bit system for the CHECKER.

Makefile
  1052  # the checker needs the correct machine size
  1053  CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32)

Link: https://lore.kernel.org/r/20241216180736.1933807-1-andrew.goodbody@linaro.org
2024-12-31 10:58:36 -06:00
Andrew Goodbody
99145eec2d x86: select CONFIG_64BIT for X86_64
Select CONFIG_64BIT so that we pass the -m64 option (instead of -m32) to
static analysis tools.
Introduce CONFIG_SPL_64BIT and select it for architectures other than
x86 with 64 bit builds. Do not select it for x86 builds as x86 uses
a 32 bit SPL.
Ensure that when limits are set they use CONFIG_64BIT for U-Boot
proper and CONFIG_SPL_64BIT for SPL. This is to allow for the 32 bit
SPL build used by x86.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2024-12-31 10:58:30 -06:00
Tom Rini
6c76f67ac5 Merge patch series "Keep the access to dtb_dt_embedded() within fdtdec"
Evgeny Bachinin <EABachinin@salutedevices.com> says:

The 1st patch addresses comments from the post-review, available by
link [1].

  The 2nd patch fixes problems of dtb_dt_embedded() with checkpatch.

Links:
[1] https://lore.kernel.org/u-boot/CAFLszTgEKamsa6FTnjzrEWQBLkqAR7EBbZqffx09AKgQ7ppuVA@mail.gmail.com/#t

Link: https://lore.kernel.org/r/20241211-dtb_dt_embedded_within_fdtdec-v1-0-7840469f0084@salutedevices.com
2024-12-31 10:57:54 -06:00
Evgeny Bachinin
623f5cf517 fdtdec: encapsulate dtb_dt_embedded() within
Patch keeps the access to dtb_dt_embedded() within fdtdec API,
by means of new API function introduction. This new function is a
common place for updating appropriate global_data fields for
OF_EMBED case.

  Also, the consequence of the patch is movement of '___dtb_dt_*begin'
symbols' declaration from header file, because nobody used symbols
outside the lib/fdtdec.c.

Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-12-31 10:57:50 -06:00
Tom Rini
c379590ab7 Merge patch series "powerpc: Fix and enforce distinction between immediates and registers"
J. Neuschäfer <j.ne@posteo.net> says:

This patchset changes the definition r0 etc. to %r0, so that the
assembler can check that registers are only used where expected, and
fixes the fallout.

Link: https://lore.kernel.org/r/20241212-gpr-checks-v1-0-8c084c5fc0b6@posteo.net
2024-12-30 15:55:11 -06:00
J. Neuschäfer
c3e425ead4 powerpc: Introduce and enforce assembler checks on GPR usage
PowerPC general-purpose registers are historically specified as plain
numbers (0-31), which makes them hard to distinguish from immediates.
For this reason, include/ppc_asm.tmpl defines aliases named r0-r31.
This can still lead to uncaught mistakes if a register is used in place
of a number.

Instead of (e.g.) 5 use %r5, which will result in an assembler warning
if used as a number. Turn these warnings into errors by passing
`--fatal-warnings` to the assembler.

I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig
(MPC85xx) that this patch results in the same machine code.

Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2024-12-30 15:55:07 -06:00
Ilias Apalodimas
1a25191bc1 lmb: Rename _lmb_alloc_addr() to lmb_alloc_addr_flags()
lmb_alloc_addr_flags() is a wrapper for _lmb_alloc_addr() and it's the
only function using it. Rename _lmb_alloc_addr() to lmb_alloc_addr_flags()
and remove the wrapper.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-30 13:21:55 -06:00
Ilias Apalodimas
3075708017 lmb: Remove lmb_alloc_base_flags()
lmb_alloc_base() is just calling lmb_alloc_base_flags() with LMB_NONE.
There's not much we gain from this abstraction, so let's remove the
former add the flags argument to lmb_alloc_base() and make the code
a bit easier to follow.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-30 13:21:55 -06:00
Ilias Apalodimas
15e0c5e390 lmb: Remove lmb_alloc_addr_flags()
lmb_alloc_addr() is just calling lmb_alloc_addr_flags() with LMB_NONE
There's not much we gain from this abstraction, so let's remove the
latter, add a flags argument to lmb_alloc_addr() and make the code a
bit easier to follow.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-30 13:21:55 -06:00
Ilias Apalodimas
400c34db89 lmb: Rename free_mem to available_mem
free_mem is a misnomer. We never update it with the free memory for
LMB. Instead, it describes all available memory and is checked against
used_mem to decide whether an area is free or not.

So let's rename this field to better match its usage.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-30 13:21:55 -06:00
Ilias Apalodimas
900a8951c3 lmb: Remove lmb_reserve_flags()
lmb_reserve() is just calling lmb_reserve_flags() with LMB_NONE.
There's not much we gain from this abstraction.
So let's remove the latter, add the flags argument to lmb_reserve()
and make the code a bit easier to follow.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-30 13:21:55 -06:00
Ilias Apalodimas
3d56c06551 lmb: Move enum lmb_flags to a u32
LMB flags is not an enum anymore. It's currently used as a bitmask
in various places of our code. So make it a u32 which is more
appropriate when dealing with masks.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-30 13:21:55 -06:00
Sam Protsenko
22db5b2137 lmb: Improve kernel-doc comments
Fix warnings from kernel-doc script. Improve and unify overall style of
kernel-doc comments in lmb source files. Move all kernel-doc comments
for public functions into the header, as recommended in U-Boot
documentation [1]:

    Non-trivial functions should have a comment which describes what
    they do. If it is an exported function, put the comment in the
    header file so the API is in one place. If it is a static function,
    put it in the C file.

This also takes care of existing duplication. While at it, do a bit of
cosmetic cleanups as well.

No functional change.

[1] doc/develop/codingstyle.rst

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-30 13:20:24 -06:00
Tom Rini
7f296a9a70 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next 2024-12-30 12:55:39 -06:00
Marek Vasut
2fd7a04e7c arm64: renesas: Align configuration headers
Align R-Car Gen2/Gen3/Gen4 configuration header file to look
basically the same way across these three SoC generations.
There are subtle difference between the remaining bits in
those files across SoC generations, but the common bits are
now aligned. There is not much left in those headers either,
most of the configuration is now converted to Kconfig.

Specifically for R-Car Gen3, GIC registers have been moved
to architecture specific header file rcar-gen3-base.h , the
rest of the changes here are comment changes and indentation
changes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-29 16:55:31 +01:00
Mikhail Kshevetskiy
bf962de97c net/tcp: improve tcp framework, use better state machine
Changes:
 * Fix initial send sequence always zero issue
 * Use state machine close to RFC 9293. This should make TCP
   transfers more reliable (now we can upload a huge array
   of data from the board to external server)
 * Improve TCP framework a lot. This should make tcp client
   code much more simple.
 * rewrite wget with new tcp stack
 * rewrite fastboot_tcp with new tcp stack

It's quite hard to fix the initial send sequence (ISS) issue
with the separate patch. A naive attempt to fix an issue
inside the tcp_set_tcp_header() function will break tcp packet
retransmit logic in wget and other clients.

Example:
  Wget stores tcp_seq_num value before tcp_set_tcp_header() will
  be called and (on failure) retransmit the packet with the stored
  tcp_seq_num value. Thus:
    * the same ISS must allways be used (current case)
    * or tcp clients needs to generate a proper ISS when
      required.

A proper ISS fix will require a big redesing comparable with
a this one.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-12-28 11:59:42 -06:00
Mikhail Kshevetskiy
82bf3aafa6 net/tcp: rename ack_edge and seq_init to more common rcv_nxt and irs
Use the names from RFC 9293

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-12-28 11:59:42 -06:00
Mikhail Kshevetskiy
2b17749870 net/tcp: add connection info to tcp_stream structure
Changes:
 * Avoid use net_server_ip in tcp code, use tcp_stream data instead
 * Ignore packets from other connections if connection already created.
   This prevents us from connection break caused by other tcp stream.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-12-28 11:59:42 -06:00
Mikhail Kshevetskiy
ddedfe1cb8 net/tcp: put connection specific data into a tcp_stream structure
no functional changes

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-12-28 11:59:42 -06:00
Tom Rini
d580a013cc Merge patch series "vbe: Series part E"
Simon Glass <sjg@chromium.org> says:

This includes various patches towards implementing the VBE abrec
bootmeth in U-Boot. It mostly focuses on SPL tweaks and adjusting what
fatures are available in VPL.

Link: https://lore.kernel.org/r/20241219182907.2609704-1-sjg@chromium.org
2024-12-27 15:16:39 -06:00
Simon Glass
6f1b27a724 hash: Plumb crc8 into the hash functions
Add an entry for crc8, with watchdog handling.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2024-12-27 15:16:10 -06:00
Simon Glass
7a585b9d6a spl: Drop use of uintptr_t
U-Boot uses ulong for addresses. It is confusing to use uintptr_t in a
few places, since it makes people wonder if the types are compatible.
Change the few occurences in SPL to use ulong

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-12-27 15:16:10 -06:00
Simon Glass
771f0e9877 boot: Allow FIT to fall back from best-match option
When the best-match feature fails to find something, use the provided
config name as a fallback. The allows SPL to select a suitable config
when best-match is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-12-27 15:16:10 -06:00
Simon Glass
9922227ac5 image: Add a prototype for fit_image_get_phase()
This function exists but is not exported. Add a prototype so it can be
used elsewhere.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-12-27 15:16:10 -06:00
Tom Rini
5cfbf8c364 Prepare v2025.01-rc5
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Merge tag 'v2025.01-rc5' into next

Prepare v2025.01-rc5
2024-12-25 22:31:04 -06:00
Paul HENRYS
79d7b11102 aes: Allow to store randomly generated IV in the FIT
When the initialisation vector is randomly generated, its value shall be
stored in the FIT together with the encrypted data. The changes allow to
store the IV in the FIT also in the case where the key is not stored in
the DTB but retrieved somewhere else at runtime.

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-12-19 09:10:34 -06:00
Tom Rini
511b8dea97 Merge patch series "sandbox: repair compile and run-time for OF_EMBED case"
Evgeny Bachinin <EABachinin@salutedevices.com> says:

This patch-set repairs ability to use sandbox with CONFIG_OF_EMBED=y.

For now, to use OF_EMBED, the following must be done
1) sandbox64_defconfig should have:
  ```
  -CONFIG_OF_LIVE=y
  +CONFIG_OF_EMBED=y
  ```

2) On sandbox when CONFIG_OF_EMBED=y, the u-boot process can't start
due to:
  ```
  Bloblist at b000 not found (err=-2)
  initcall failed at call 000000000011829c (err=-2: No such file or \
      directory)
  ### ERROR ### Please RESET the board ###
  ```
  So, it is natural desire to disable CONFIG_BLOBLIST just to test
sandbox with OF_EMBED=y (disable it one way or another):
  ```
    config SANDBOX
  -	select BLOBLIST
  +     select BLOBLIST if SOME_NON_EXISTING_OPTION
  ```

3) As a result, having such changes (CONFIG_OF_EMBED=y &&
CONFIG_BLOBLIST=n) leads to the link & run-time errors, being fixed
by this patch series.

Link: https://lore.kernel.org/r/20241202-sandbox_repair_of_embed-v1-0-05aff4b0ccf7@salutedevices.com
[trini: The final patch is dropped as no longer relevant with Simon's
        rework to that function which is now applied.]
2024-12-18 15:43:24 -06:00
Evgeny Bachinin
e5178be686 sandbox: fix bloblist_finish() linker error if BLOBLIST=n
Having CONFIG_OF_EMBED=y && CONFIG_BLOBLIST=n leads to the link
error:
```
ld: /tmp/ccwtRVty.ltrans0.ltrans.o: in function `state_uninit':
arch/sandbox/cpu/state.c:508: undefined reference to `bloblist_finish'
```

Fixes: 1c52fcca72b ("sandbox: Write out bloblist when exiting")
Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-12-18 15:19:16 -06:00
Simon Glass
fc37a73e66 fdt: Swap the signature for board_fdt_blob_setup()
This returns a devicetree and updates a parameter with an error code.
Swap it, since this fits better with the way U-Boot normally works. It
also (more easily) allows leaving the existing pointer unchanged.

No yaks were harmed in this change, but there is a very small code-size
reduction.

For sifive, the OF_BOARD option must be set for the function to be
called, so there is no point in checking it again. Also OF_SEPARATE is
defined always.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
[trini: Update total_compute]
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-12-18 15:18:59 -06:00
Kongyang Liu
1cd239f444 riscv: spacemit: bananapi_f3: initial support added
Add basic support for SpacemiT's Banana Pi F3 board.
Update the k1.dtsi align with mainline.
Note that the device tree files follow the mainline Linux source[1].

Links: https://patches.linaro.org/project/linux-serial/patch/20240730-k1-01-basic-dt-v5-8-98263aae83be@gentoo.org/ [1]

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Signed-off-by: Huan Zhou <pericycle.cc@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
2024-12-18 13:19:16 +08:00
Hal Feng
84d3911a01 dts: starfive: Switch to using upstream DT
Enable OF_UPSTREAM to use upstream DT and add starfive/ prefix to
the DEFAULT_DEVICE_TREE. Rename jh7110-starfive-visionfive-2-u-boot.dtsi
to jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi and set the v1.3b
device tree as the default device tree.

Drop redundant DT files from arch/riscv/dts/ and redundant clock and
reset definitions from include/dt-bindings/.

Since the old clock definitions is a little different from those in
upstream Linux, update the clock definitions in clock drivers
accordingly.

Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: E Shattow <lucent@gmail.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2024-12-18 13:19:15 +08:00
Thomas Bonnefille
04bcc87f0d board: add support for LicheeRV Nano
The LicheeRV Nano is a small SBC using the Sophgo SG2002 RISCV SoC.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
2024-12-18 13:19:15 +08:00
Tom Rini
50334151c0 Merge tag 'fsl-qoriq-2024-12-15' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/23856

- Use strcat to replace sprintf for t208xqds
- Fix bootefi for board ls1028a
- Various fixes to sl28 board
2024-12-15 08:02:46 -06:00
Wei Ming Chen
b4626f3934 configs: ls1028a: Fix bootefi issue on Layerscape ls1028ardb platform
Without this patch, there will be error indicating that
"Cannot use 64 bit addresses with SDMA", and the booting
process will stuck.

please see full boot log below

U-Boot 2022.04-g18185931 (Sep 11 2024 - 13:15:30 +0800)

SoC:  LS1028AE Rev1.0 (0x870b0010)
Clock Configuration:
       CPU0(A72):1500 MHz  CPU1(A72):1500 MHz
       Bus:      400  MHz  DDR:      1600 MT/s
Reset Configuration Word (RCW):
       00000000: 3c004010 00000030 00000000 00000000
       00000010: 00000000 018f0000 0030c000 00000000
       00000020: 020031a0 00002580 00000000 00003296
       00000030: 00000000 00000010 00000000 00000000
       00000040: 00000000 00000000 00000000 00000000
       00000050: 00000000 00000000 00000000 00000000
       00000060: 00000000 00000000 200e705a 00000000
       00000070: bb580000 00000000
Model: LS1028A RDB Board
Board: LS1028AE Rev1.0-RDB, Version: C, boot from SD
FPGA: v8 (RDB)
SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MHz
DRAM:  3.9 GiB
DDR    3.9 GiB (DDR4, 32-bit, CL=11, ECC on)
Using SERDES1 Protocol: 47960 (0xbb58)
PCIe1: pcie@3400000 Root Complex: no link
PCIe2: pcie@3500000 Root Complex: x1 gen2
Core:  45 devices, 22 uclasses, devicetree: separate
WDT:   Started watchdog@c000000 with servicing (60s timeout)
WDT:   Started watchdog@c010000 with servicing (60s timeout)
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

EEPROM: Invalid ID (ff ff ff ff)
In:    serial
Out:   serial
Err:   serial
SEC0:  RNG instantiated
Net:
Warning: enetc-0 (eth0) using random MAC address - d2:9b:a5:37:7b:b5
eth0: enetc-0
Warning: enetc-2 (eth1) using random MAC address - ca:57:11🇩🇪de:cb
, eth1: enetc-2, eth2: swp0, eth3: swp1, eth4: swp2, eth5: swp3
Hit any key to stop autoboot:  0
Trying load HDP firmware from SD..
switch to partitions #0, OK
mmc0 is current device
Device: FSL_SDHC
Manufacturer ID: 9f
OEM: 5449
Name: SD32G
Bus Speed: 50000000
Mode: SD High Speed (50MHz)
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 28.9 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes

MMC read: dev # 0, block # 18944, count 512 ... 512 blocks read: OK
Loading hdp firmware from 0x00000000a0000000 offset 0x0000000000002000
Loading hdp firmware Complete
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
** Unable to read file / **
Failed to load '/'
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
Scanning disk mmc@2140000.blk...
Scanning disk mmc@2150000.blk...
Found 7 disks
ERROR: invalid device tree
Found EFI removable media binary efi/boot/bootaa64.efi
981992 bytes read in 44 ms (21.3 MiB/s)
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
WARNING could not find node vivante,gc: FDT_ERR_NOTFOUND.
Booting /efi\boot\bootaa64.efi
Cannot use 64 bit addresses with SDMA
Error reading cluster
** Unable to read file /efi/boot/grubaa64.efi **
Unexpected return from initial read: Device Error, buffersize 29D790
Failed to load image ぀¬ : Device Error
start_image() returned Device Error
EFI LOAD FAILED: continuing...
switch to partitions #0, OK
mmc1(part 0) is current device
Scanning mmc 1:1...
** Unable to read file / **
Failed to load '/'
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
BootOrder not defined
EFI boot manager: Cannot load any image
Scanning mmc 1:2...
** Unable to read file / **
Failed to load '/'
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
BootOrder not defined
EFI boot manager: Cannot load any image
starting USB...
Bus usb@3100000: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
Bus usb@3110000: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus usb@3100000 for devices... 1 USB Device(s) found
scanning bus usb@3110000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Device 0: unknown device
Trying load from SD ...
switch to partitions #0, OK
mmc0 is current device
Device: FSL_SDHC
Manufacturer ID: 9f
OEM: 5449
Name: SD32G
Bus Speed: 50000000
Mode: SD High Speed (50MHz)
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 28.9 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes

MMC read: dev # 0, block # 32768, count 81920 ... 81920 blocks read: OK
Wrong Image Format for bootm command
ERROR: can't get kernel image!

Signed-off-by: Wei Ming Chen <jj251510319013@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-12-15 09:49:16 +08:00
Simon Glass
920e165ebf efi_loader: Fix typos in enum efi_allocate_type
Fix 'indicatged' and 'adress' typos.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-12-15 02:07:23 +01:00
Tom Rini
8aab7730c1 Merge patch series "Hyperflash Boot fixes for J7200/J721E"
Anurag Dutta <a-dutta@ti.com> says:

Hi All,
In u-boot, hbmc is broken and has been removed from j7200
configs. This series re-enables the hbmc driver and introduces a series
of hyperflash boot fixes. At present, in u-boot, the parent device (fss)
gets registered as a syscon device. This is done because the MMIO
mux driver in u-boot did not support the mux functionality when the
parent device is not a syscon. In this series, we make relevant changes
in the hbmc driver as well as dts' so that we can use the reg-mux driver for
selecting the appropriate state of the mux.

Test logs:

1) j721e-idk-gw hyperflash boot test: https://gist.github.com/anuragdutta731/50aae6fec707a3ffad6d985de6757fe4
2) j7200-evm hyperflash boot test: https://gist.github.com/anuragdutta731/c3a4d60f8bfd9c425d6c44b36eb7322b

Link: https://lore.kernel.org/r/20241129113136.383277-1-a-dutta@ti.com
2024-12-14 09:34:27 -06:00
Aswath Govindraju
0dfb7b821c include: configs: j721e_evm: Increase memory offset for tiboot3.bin in HyperFlash
The size of J7200 tiboot3.bin is 516KB but the memory reserved for it in
HyperFlash was 512KB. This led to overlap of tiboot3.bin over tispl.bin
region and break in HyperFlash boot mode.

Therefore, fix this by increasing the memory allocated for tiboot3.bin
to 1MB for J7200.

Fixes: cf1d6867f774 ("board: ti: j7200: Introduce support for j7200 build targets")

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
2024-12-14 09:34:16 -06:00
Tom Rini
6b01124f7c Merge patch series "UART support for higher baudrate"
Gokul Praveen <g-praveen@ti.com> says:

The OMAP specific UART driver is changed from a generic implementation of
certain ops functions to an OMAP specific implementation of it to add
support for higher baudrates for OMAP devices.

Hence to support the above change, static functionality of ops functions
in generic ns16550 UART U-Boot driver is removed and also migrated certain
macros to its header file for usage in device-specific drivers.

Boot logs link :

https://gist.github.com/GOKU-THUG/8b90117c963e5da5c1b6caeee427c82c

Link: https://lore.kernel.org/r/20241126105131.43359-1-g-praveen@ti.com
2024-12-14 09:33:03 -06:00
Gokul Praveen
a9c61ac04f serial: ns16550: Increase scope of ops functions
Increase scope of ops functions and do some clean up for usage in device
-specific UART drivers.

Remove the static functionality of ops functions and migrate certain macros
to header file for usage in device-specific drivers.

Signed-off-by: Gokul Praveen <g-praveen@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-12-14 09:32:59 -06:00
Tom Rini
5360c683e6 Merge patch series "Add phyCORE AM62Ax"
Garrett Giordano <ggiordano@phytec.com> says:

This patch set adds the phyCORE AM62Ax board support and documenation to
u-boot.

The phyCORE-AM62Ax is a SoM (System on Module) featuring TI's AM62Ax SoC. It can
be used in combination with different carrier boards. This module can come
with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs
from the AM62x family.

A development Kit, called phyBOARD-Lyra is used as a carrier board reference
design around the AM62x SoM.

This series depends on the following two patches:
- [PATCH v2] arm: mach-k3: am62a7: Provide a way to obtain boot device for non SPL
  https://lists.denx.de/pipermail/u-boot/2024-October/570156.html
- [PATCH] board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH
  https://lists.denx.de/pipermail/u-boot/2024-November/571543.html

Link: https://lore.kernel.org/r/20241118231606.3161665-1-ggiordano@phytec.com
[trini: Fix warning in board/phytec/common/k3/board.c when
        CONFIG_EFI_HAVE_CAPSULE_SUPPORT is not enabled]
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-12-13 20:09:41 -06:00
Garrett Giordano
d13e67c24d board: phytec: am62a7: Add PHYTEC phyCORE-AM62A7 SoM
Add support for PHYTEC phyCORE-AM62A7 SoM.

Supported features:
  - 2GB LPDDR4 RAM
  - eMMC
  - External SD
  - Ethernet
  - debug UART

Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2024-12-13 17:30:01 -06:00
Tom Rini
7917841b00 Merge patch series "Enable EFI capsule updates for PHYTEC K3 SoMs"
Wadim Egorov <w.egorov@phytec.de> says:

This implements capsule updates for all our K3 SoMs for
eMMC, OSPI NOR and uSD cards.

We can use capsule updates to update the bootloader on all our
supported flash devices.

Link: https://lore.kernel.org/r/20241127121736.1525948-1-w.egorov@phytec.de
2024-12-13 14:15:43 -06:00
Wadim Egorov
f9fc0b7a2e board: phytec: k3: Add EFI capsule update support
Implement EFI capsule update functionality for PHYTEC K3-based SoMs.
These SoMs feature various flash device options, including eMMC,
OSPI NOR, and uSD card at the board level.

This update provides the necessary logic to enable EFI capsule updates
across all three flash devices, ensuring flexible and robust firmware
upgrade capabilities.

The GUID is dynamically generated for the board, to get it:

  efidebug capsule esrt
  ========================================
  ESRT: fw_resource_count=3
  ESRT: fw_resource_count_max=3
  ESRT: fw_resource_version=1
  [entry 0]==============================
  ESRT: fw_class=C7D64D6D-10B2-54BC-A3BF-06A9DC3653D9
  ESRT: fw_type=unknown
  ESRT: fw_version=0
  ESRT: lowest_supported_fw_version=0
  ESRT: capsule_flags=0
  ESRT: last_attempt_version=0
  ESRT: last_attempt_status=success
  [entry 1]==============================
  ESRT: fw_class=09841C3F-F177-5D57-B1F6-754D92879205
  ESRT: fw_type=unknown
  ESRT: fw_version=0
  ESRT: lowest_supported_fw_version=0
  ESRT: capsule_flags=0
  ESRT: last_attempt_version=0
  ESRT: last_attempt_status=success
  [entry 2]==============================
  ESRT: fw_class=D11A9016-515E-503A-8872-3FF65384D0C4
  ESRT: fw_type=unknown
  ESRT: fw_version=0
  ESRT: lowest_supported_fw_version=0
  ESRT: capsule_flags=0
  ESRT: last_attempt_version=0
  ESRT: last_attempt_status=success
  ========================================

On the board (from uSD card containing capsule binaries at boot):

  load mmc 1:1 $loadaddr tiboot3-capsule.bin
  efidebug capsule update $loadaddr

  load mmc 1:1 $loadaddr tispl-capsule.bin
  efidebug capsule update $loadaddr

  load mmc 1:1 $loadaddr uboot-capsule.bin
  efidebug capsule update $loadaddr

The binaries will be flashed to the flash device you are booted from.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2024-12-13 14:15:31 -06:00
Tom Rini
a33185173d Revert "Merge patch series "vbe: Series part E""
This reverts commit 1fdf53ace13f745fe8ad4d2d4e79eed98088d555, reversing
changes made to e5aef1bbf11412eebd4c242b46adff5301353c30.

I had missed that this caused too much size growth on rcar3_salvator-x.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-12-12 21:07:26 -06:00
Tom Rini
1fdf53ace1 Merge patch series "vbe: Series part E"
Simon Glass <sjg@chromium.org> says:

This includes various patches towards implementing the VBE abrec
bootmeth in U-Boot. It mostly focuses on SPL tweaks and adjusting what
fatures are available in VPL.

Link: https://lore.kernel.org/r/20241207172412.1124558-1-sjg@chromium.org
2024-12-12 16:35:47 -06:00
Simon Glass
f0315babfb hash: Plumb crc8 into the hash functions
Add an entry for crc8, with watchdog handling.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-12-12 16:35:24 -06:00
Simon Glass
290d0cf0c0 spl: Drop use of uintptr_t
U-Boot uses ulong for addresses. It is confusing to use uintptr_t in a
few places, since it makes people wonder if the types are compatible.
Change the few occurences in SPL to use ulong

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-12-12 16:35:24 -06:00
Simon Glass
94ad46e2ae boot: Allow FIT to fall back from best-match option
When the best-match feature fails to find something, use the provided
config name as a fallback. The allows SPL to select a suitable config
when best-match is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-12-12 16:35:23 -06:00
Simon Glass
3344767d32 image: Add a prototype for fit_image_get_phase()
This function exists but is not exported. Add a prototype so it can be
used elsewhere.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-12-12 16:35:23 -06:00
Tom Rini
9bc62c980d Prepare v2025.01-rc4
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Merge tag 'v2025.01-rc4' into next

Prepare v2025.01-rc4
2024-12-09 16:29:47 -06:00