27339 Commits

Author SHA1 Message Date
Simon Glass
eb6e87a7ab alist: Expand the comment for alist_get()
Add a better description for this macro.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-03 21:27:12 -06:00
Simon Glass
55c8aad164 alist: Add a comment for alist_init_struct()
Comment this macro so that it is clear how to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-03 21:27:12 -06:00
Simon Glass
805e89e3f7 alist: Mention the error condition in alist_add_placeholder()
Update the function comment to note that this function can return NULL
if it runs out of memory.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-03 21:27:12 -06:00
Simon Glass
cedf9ccaa2 dm: core: Add a function to see if a device exists
All the uclass functions for finding a device end up creating a uclass
if it doesn't exist. Add a function which instead returns NULL in this
case.

This is useful when in the 'unbind' path, since we don't want to undo
any unbinding which has already happened.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-02 11:13:59 -06:00
Simon Glass
d01c58acb7 alist: Add a way to efficiently filter an alist
Unlike linked lists, it is inefficient to remove items from an alist,
particularly if it is large. If most items need to be removed, then the
time-complexity approaches O(n2).

Provide a way to do this efficiently, by working through the alist once
and copying elements down.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-02 11:13:59 -06:00
Simon Glass
70f5f17415 alist: Add a function to empty the list
Sometimes it is useful to empty the list without de-allocating any of
the memory used, e.g. when the list will be re-populated immediately
afterwards.

Add a new function for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-02 11:13:59 -06:00
Simon Glass
83bc5989fc alist: Add for-loop helpers
Add some macros which permit easy iteration through an alist, similar to
those provided by the 'list' implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-02 11:13:59 -06:00
Simon Glass
2ce146a3de alist: Add a way to get the next element
Add a new function which returns the next element after the one
provided, if it exists in the list.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-02 11:13:59 -06:00
Simon Glass
6668d860f7 alist: Expand the comment for alist_get()
Add a better description for this macro.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-02 11:13:59 -06:00
Simon Glass
13bd298499 alist: Add a comment for alist_init_struct()
Comment this macro so that it is clear how to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-02 11:13:59 -06:00
Simon Glass
a8c07ac497 alist: Mention the error condition in alist_add_placeholder()
Update the function comment to note that this function can return NULL
if it runs out of memory.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-11-02 11:13:59 -06:00
Tom Rini
8e5e64d55d Merge patch series "fs: ext4: implement opendir, readdir, closedir"
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> says:

With this series opendir, readdir, closedir are implemented for ext4.
These functions are needed for the UEFI sub-system to interact with
the ext4 file system.

To reduce code growth the functions are reused to implement the ls
command for ext4.

A memory leak in ext4fs_exists is resolved.

ext4fs_iterate_dir is simplified by removing a redundant pointer copy.

Link: https://lore.kernel.org/r/20241026064048.370062-1-heinrich.schuchardt@canonical.com
2024-11-01 13:38:05 -06:00
Heinrich Schuchardt
22fdac381f fs: ext4: implement opendir, readdir, closedir
For accessing directories from the EFI sub-system a file system must
implement opendir, readdir, closedir. Provide the missing implementation.

With this patch the eficonfig command can be used to define load options
for the ext4 file system.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-11-01 13:37:58 -06:00
Tom Rini
1d147b74f4 Merge patch series "mtd: spi-nor: Remove recently added nor->addr_width == 3 test"
Tom Rini <trini@konsulko.com> says:

In the patch series "spi-nor: Add parallel and stacked memories support"
a number of issues have since been raised about problems that now exist
on a large number of previously working platforms. Marek Vasut has gone
and identified a number of issues and this series is the starting point
of attempting to address them and fix the problems with previously
existing platforms.

Link: https://patchwork.ozlabs.org/project/uboot/list/?series=429932&state=*
Link: https://lore.kernel.org/r/20241026201741.171073-1-marek.vasut+renesas@mailbox.org
2024-10-31 10:50:25 -06:00
Marek Vasut
f896aa6567 mtd: spi-nor: Rename SPI_ADVANCE to SPI_STACKED_PARALLEL
The SPI_ADVANCE description does not explain what the switch does.
It does not have anything to do with any advanced functionality, it
only gates off support for stacked and parallel SPI NORs. Rename the
Kconfig symbol, update description, and move it right next to Xilinx
hardware as it seems to be specific to this hardware. Make sure the
symbol is also protected by if DM_SPI in Kconfig.

Fixes: 5d40b3d384dc ("mtd: spi-nor: Add parallel and stacked memories support")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-10-31 10:49:47 -06:00
Heinrich Schuchardt
9aabcad1a7 fs: ext4: document struct ext2_inode
Provide Sphinx style documentation for struct ext2_inode.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-30 21:44:39 +01:00
Heinrich Schuchardt
aa636678f9 fs: improve API documentation
* Describe the fields of struct fs_dir_stream.
* Update fs_readdir() and fs_opendir() description.
* Fix Sphinx errors.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-10-30 21:44:38 +01:00
Tom Rini
5cca0e3f6e Merge tag 'u-boot-imx-master-20241029' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/23092

- Implement i.MX93 erratum fix on the dwc_eth_qos driver to fix RMII.
- Add support for Emcraft Systems NavQ+.
- Fix the size of IVT + CSF blob tacked on to u-boot.itb.
2024-10-29 18:46:08 -06:00
Ilias Apalodimas
ede2361998 lmb: Remove lmb_alloc_flags()
lmb_alloc_flags() & lmb_alloc_base_flags() are just a wrappers for
_lmb_alloc_base(). Since the only difference is the max address of the
allowed allocation which _lmb_alloc_base() already supports with the
LMB_ALLOC_ANYWHERE flag, remove one of them.

Keep the lmb_alloc_base_flags() which also prints an error on failures
and adjust efi_allocate_pages() to only use one of them.

While at it clean up the duplicate function description from the header
file.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-10-29 16:17:47 -06:00
Jonas Jelonek
8145d37918 cpu_func.h: provide noncached_set_region prototype to fix build
Due to the removal of weak functions in 7d6cee2cd0 ("cmd: cache: Remove
weak function"), U-Boot fails to compile after updating to v2024.10 for
mediatek target in OpenWrt with GCC-14 with error:
cmd/cache.c: In function 'do_dcache':
cmd/cache.c:57:25: error: implicit declaration of function
	'noncached_set_region' [-Wimplicit-function-declaration]

Thus, provide a prototype in include/cpu_func.h to fix a build
error in cmd/cache.c, since related prototypes are also located there.

The issue occurred after the update of uboot-mediatek in OpenWrt to
v2024.10, in combination with GCC-14 toolchain. It was reported and
discussed in https://github.com/openwrt/openwrt/issues/16697, and
temporarily fixed with
92ca322dd1.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/issues/16697
Link: 92ca322dd1
Fixes: 7d6cee2cd0 ("cmd: cache: Remove weak function")
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-29 16:17:32 -06:00
Tom Rini
17e476aa05 CONFIG_SYS_NONCACHED_MEMORY: Move prototypes to include/cpu_func.h for consistency
Currently, a number of generic cache related functions have their common
prototype declared in include/cpu_func.h. Move the current set of
noncached functions there as well to match.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-29 16:17:18 -06:00
Gilles Talis
1beb665c50 board: emcraft: Add support for Emcraft Systems NavQ+
The Emcraft Systems NavQ+ kit is a mobile robotics platform
based on NXP i.MX8 MPlus SoC.

The following interfaces and devices are enabled:
- eMMC
- Gigabit Ethernet (through eQOS interface)
- SD-Card
- UART console

The device tree file is taken from upstream Linux Kernel
through OF_UPSTREAM

Signed-off-by: Gilles Talis <gilles.talis@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2024-10-29 16:25:25 -03:00
Tom Rini
dfe9e29f83 Merge https://source.denx.de/u-boot/custodians/u-boot-sh 2024-10-29 10:05:30 -06:00
Tom Rini
1466ff7d83 Merge patch series "boards: siemens: iot2050: SM variant, sysinfo support, fixes & cleanups"
Jan Kiszka <jan.kiszka@siemens.com> says:

This adds support for the new IOT2050 SM variant, introduces a sysinfo
driver which also permits SMBIOS support and switches the board to
OF_UPSTREAM. There are some further fixes for the boards included as well.

Not yet included is configuration support for DMA isolation via the PVU as
this depends on not yet merged DT bindings and another overlay.

[trini: This is just the first 10 patches in the series for now]

Link: https://lore.kernel.org/r/cover.1729577070.git.jan.kiszka@siemens.com
2024-10-29 10:05:30 -06:00
Baocheng Su
10cf194e49 board: siemens: iot2050: Pass DDR size from FSBL
Due to new DDR size introduction, the current logic of determining the
DDR size is not able to get the correct size.

Instead, the DDR size is determined by the FSBL(SEBOOT) then passed to
u-boot through the scratchpad info.

The SEBoot version must be >= D/V01.04.01.02 to support this change.

Also now for some variants, the DDR size may > 2GB, so borrow some code
from the TI evm to iot2050 to support more than 2GB DDR.

Signed-off-by: Baocheng Su <baocheng.su@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2024-10-28 20:54:23 -06:00
Jan Kiszka
23750f60fa board: siemens: iot2050: Fix mistake in list of writable env vars
This prevented to set m2_manual_config - as evaluated by
m2_connector_setup - under strict configurations for secure boot.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2024-10-28 20:54:23 -06:00
Marek Vasut
c2392bd456 ARM: renesas: Drop old unused power DT headers
Renesas R-Car systems use mainline Linux DTs for U-Boot via OF_UPSTREAM,
which also includes headers from dts/upstream/include/dt-bindings/power .
Remove unused legacy DT header files from include/dt-bindings/power .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-10-28 16:27:29 +01:00
Marek Vasut
f93059f68b ARM: renesas: Drop old unused clock DT headers
Renesas R-Car systems use mainline Linux DTs for U-Boot via OF_UPSTREAM,
which also includes headers from dts/upstream/include/dt-bindings/clock .
Remove unused legacy DT header files from include/dt-bindings/clock .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-10-28 16:27:29 +01:00
LekKit
aed8febc3d riscv: qemu: Enable booting from NVMe
QEMU supports NVMe devices, but U-Boot only tries to boot from Virtio.
This is problematic when explicitly using NVMe, so fix that.

Additionally, RVVM virtual machine is almost fully compatible with QEMU,
except it only implements NVMe drives instead of VirtIO.
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-10-28 16:11:33 +08:00
Tom Rini
2800aecce0 Merge patch series "Implement ACPI on aarch64"
Patrick Rudolph <patrick.rudolph@9elements.com> says:

Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testing of the proposed
solution.

The series is split into ACPI cleanups and code movements, adding
Arm specific ACPI tables and finally SoC and mainboard related
changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the
mandatory ACPI tables are supported, allowing to boot into Linux
without errors.

The QEMU SBSA support is feature complete and provides the same
functionality as the EDK2 implementation.

The changes were tested on real hardware as well on QEMU v9.0:

qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \
                    -pflash secure-world.rom \
                    -pflash unsecure-world.rom

qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \
-smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \
-dtb bcm2711-rpi-4-b.dtb -nographic

Tested against FWTS V24.03.00.

Known issues:
- The QEMU rpi4 support is currently limited as it doesn't emulate PCI,
  USB or ethernet devices!
- The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly
  cache related).
- PCI on RPI4 isn't working on real hardware since the pcie_brcmstb
  Linux kernel module doesn't support ACPI yet.

Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
2024-10-27 18:44:13 -06:00
Patrick Rudolph
34bfe8eff8 arm: cpu: Add ACPI parking protocol support
On Arm platforms that use ACPI they cannot rely on the "spin-table"
CPU bringup usually defined in the FDT. Thus implement the
'ACPI Multi-processor Startup for ARM Platforms', also referred to as
'ACPI parking protocol'.

The ACPI parking protocol works similar to the spin-table mechanism, but
the specification also covers lots of shortcomings of the spin-table
implementations.

Every CPU defined in the ACPI MADT table has it's own 4K page where the
spinloop code and the OS mailbox resides. When selected the U-Boot board
code must make sure that the secondary CPUs enter u-boot after relocation
as well, so that they can enter the spinloop code residing in the ACPI
parking protocol pages.

The OS will then write to the mailbox and generate an IPI to release the
CPUs from the spinloop code.

For now it's only implemented on ARMv8, but can easily be extended to
other platforms, like ARMv7.

TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2024-10-27 17:24:13 -06:00
Patrick Rudolph
6d722894fd board: emulation: Add QEMU sbsa support
Add support for Arm sbsa [1] v0.3+ that is supported by QEMU [2].

Unlike other Arm based platforms the machine only provides a minimal
FDT that contains number of CPUs, ammount of memory and machine-version.
The boot firmware has to provide ACPI tables to the OS.
Due to this design a full DTB is added here as well that allows U-Boot's
driver to properly function. The DTB is appended at the end of the U-Boot
image and will be merged with the QEMU provided DTB.

In addition provide documentation how to use, enable binman to fabricate both
ROMs that are required to boot and add ACPI tables to make it full compatible
to the EDK2 reference implementation.

The board was tested using Fedora 40 Aarch64 Workstation. It's able
to boot from USB and AHCI or network.

Tested and found working:
- serial
- PCI
- xHCI
- Bochs display
- AHCI
- network using e1000e
- CPU init
- Booting Fedora 40

1: Server Base System Architecture (SBSA)
2: https://www.qemu.org/docs/master/system/arm/sbsa.html

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Cc: Peter Robinson <pbrobinson@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2024-10-27 17:24:13 -06:00
Patrick Rudolph
f116feadea drivers: misc: irq-uclass: Update irq_get_by_index
Support reading the "interrupts" property from the devicetree in case
the "interrupts-extended" property isn't found. As the "interrupts"
property is commonly used, this allows to parse all existing FDT and
makes irq_get_by_index() more useful.

The "interrupts" property doesn't contain a phandle as "interrupts-extended"
does, so implement a new method to locate the interrupt-parent called
irq_get_interrupt_parent().

TEST: Read the interrupts from the GIC node for ACPI MADT generation.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Moritz Fischer <moritzf@google.com>
2024-10-27 17:24:13 -06:00
Patrick Rudolph
4ac655cd1a acpi: Add processor device
Add a new method to write the processor device identified by _HID
ACPI0007, that is preferred over the Processor OpCode since ACPI 6.0.

Fixes booting arm using ACPI only since the Processor OpCode isn't
found valid by the Linux kernel.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
2024-10-27 17:24:13 -06:00
Patrick Rudolph
3451e03238 acpi: Move function prototype
Allow other architectures to use acpi_create_mcfg_mmconfig as well
by moving the function prototype to common code.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
2024-10-27 17:24:13 -06:00
Patrick Rudolph
bf5d37662d acpi: acpi_table: Add IORT support
The SoC can implement acpi_fill_iort to update the IORT table.
Add a helper function to fill out the NAMED_COMPONENT node.

TEST=Run FWTS V24.03.00 on RPi4 and round no problems.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
2024-10-27 17:24:13 -06:00
Patrick Rudolph
7f91bcac1e acpi: Add ACPITAB for PPTT and GTDT
Return the ACPI table revision in acpi_get_table_revision() for
PPTT and GTDT. Match both to ACPI 6.2.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
2024-10-27 17:24:13 -06:00
Patrick Rudolph
4b882f63d4 acpi: acpi_table: Bump revisions
The FADT structure found in U-Boot represents FADT revision 6 and the
GICC and GICD structures defined in U-Boot are based on ACPI revision
6.3.

Bump the table revision to fix FWTS failures seen on aarch64.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2024-10-27 17:24:13 -06:00
Patrick Rudolph
763bad3e1c acpi: Add fill_madt to acpi_ops
Add a new method to acpi_ops to let drivers fill out ACPI MADT.
The code is unused for now until drivers implement the new ops.

TEST: Booted on QEMU sbsa using driver model generated MADT.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
2024-10-27 17:24:13 -06:00
Patrick Rudolph
f36e29e8da arm: acpi: Add generic ACPI methods
Add generic ACPI code to generate
- MADT GICC
- MADT GICD
- MADT GICR
- MADT GIC ITS
- PPTT processor
- PPTT cache

as commonly used on arm platforms.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
2024-10-27 17:24:13 -06:00
Patrick Rudolph
04001adce1 acpi: Add define for GTDT
Add the interrupt flag used in ACPI GTDT table as define.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Moritz Fischer <moritzf@google.com>
2024-10-27 17:24:13 -06:00
Maximilian Brune
ea37e5064e serial: serial_pl01x: Implement .getinfo() for PL01
When ACPI is enabled on arm it will use the getinfo function to fill
the SPCR ACPI table.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Moritz Fischer <moritzf@google.com>
2024-10-27 17:24:12 -06:00
Patrick Rudolph
d016abb47f acpi: Fix typo
Rename ACPI tables MADR to MADT.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
2024-10-27 17:12:45 -06:00
Patrick Rudolph
4a3fc0f525 acpi: x86: Move MADT to common code
Write MADT in common code and let the SoC fill out the body by
calling acpi_fill_madt() which must be implemented at SoC level.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2024-10-27 17:12:44 -06:00
Maximilian Brune
f5f7962091 acpi: x86: Write FADT in common code
Write the FADT in common code since it's used on all architectures.
Since the FADT is mandatory all SoCs or mainboards must implement the
introduced function acpi_fill_fadt() and properly update the FADT.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2024-10-27 17:12:44 -06:00
Maximilian Brune
1c03efc014 acpi: x86: Move SPCR and DBG2 into common code
This moves the SPCR and DBG2 table generation into common code, so that
they can be used by architectures other than x86.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2024-10-27 17:12:44 -06:00
Tom Rini
8963d433eb Merge tag 'u-boot-rockchip-20241026' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/22993

- New boards:
        rk3566: Hardkernel ODROID-M1S
        rk3588s: Hardkernel ODROID-M2
        rk3588: NanoPC-T6 LTS
- Migrate to use USB_DWC3_GENERIC for rk3328
- Other board level config and dts update
2024-10-26 08:10:31 -06:00
Alex Shumsky
ed4ae73862 rockchip: board: Increase rng-seed size to make it sufficient for modern Linux
Increase rng-seed size to make Linux happy and initialize rng pool instantly.
Linux 5.19+ requires 32 bytes of entropy to initialize random pool, but u-boot
currently provides only 8 bytes.
Linux 5.18 and probably some versions before it used to require 64 bytes.
Bump min value to 64 bytes to be on a safe side.

Boot with 8 byte rng-seed (Linux 6.11):
    # dmesg | grep crng
    [   12.089286] random: crng init done
Boot with 32 byte rng-seed (Linux 6.11):
    # dmesg | grep crng
    [    0.000000] random: crng init done

Linux source references:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/char/random.c?h=v5.19#n551
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/char/random.c?h=v5.18#n236

Signed-off-by: Alex Shumsky <alexthreed@gmail.com>
Fixes: d2048bafae40 ("rockchip: board: Add board_rng_seed() for all Rockchip devices")
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Tom Rini
47423b81c2 Merge tag 'u-boot-imx-master-20241025a' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22989

- Remove unneeded USB board code and fix reset on mx6ul_14x14_evk.
- Update fastboot buffer size/address for verdin-imx8m{m|p}.
- Fix imxrt1050-evk boot and convert it to standard boot.
- Fix imx8qxp-mek and imx8qm-mek boot.
- Add support for the i.MX93 9X9 QSB board.
- Make livetree API to work on i.MX.
- Set sane default value for i.MX8M SPL_LOAD_FIT_ADDRESS.
- Deduplicate DH i.MX8MP/i.MX6 DHSOM defconfigs.
- Select default TEXT_BASE for i.MX6/i.MX7.
- Several updates for DH i.MX8MP DRC02.
2024-10-25 18:51:05 -06:00
Jesse Taube
9e5d462a37 configs: imxrt1050-evk: Enable standard boot
Enable standard boot support and add default environments for the
imxrt1050-evk board.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2024-10-25 20:12:15 -03:00