25838 Commits

Author SHA1 Message Date
Romain Naour
d164577fdb net: ksz9477: prepare ksz9477 without I2C support
With the upcoming ksz9477 SPI support added, the I2C support
will be optional. Either the I2C or the SPI bus will be used.

For now, DM_I2C is still mandatory.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
8a63113de0 net: ksz9477: rename ksz_i2c_probe() to ksz_probe()
In order to support management bus other than the I2C, rename
ksz_i2c_probe() to ksz_probe() since this function is no longer
specific to the I2C bus.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
9c4413b246 net: ksz9477: store ksz bus operations functions
The ksz9477 Linux kernel driver is based on regmap API to seamlessly
communicate to switch devices connected via different buses like SPI
or I2C. The current regmap implementation in U-Boot only supports
memory-mapped registers access [1].

Until regmap API with bus support is available in U-boot, introduce
struct ksz_phy_ops to store low-level ksz bus operations (I2C for now).

[1] https://lists.denx.de/pipermail/u-boot/2018-May/329392.html

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
b507f1a507 net: ksz9477: set i2c bus offset length only when needed
In order to add ksz9477 SPI bus support, check parent bus
is an I2C bus before calling i2c_set_offset_len().

Doing so, ksz_i2c_probe() will now return an error (-EINVAL) if
the parent bus is not the one expected by the ksz-switch u-boot
driver.

Indeed, the DSA KSZ devicetree binding doesn't specify anything
about the underlying bus between the SoC and the DSA switch, so
the same "compatible" string can be used wathever the management
interface used (SPI or I2C).

The ksz-switch u-boot driver currently only support I2C interface
but will match a compatible "microchip,ksz9xxx" located under
under an SPI bus node.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
04c183c542 net: ksz9477: rename udevice_id tab to ksz_ids
The DSA KSZ devicetree binding doesn't specify anything about the
underlying bus between the SoC and the DSA switch, so the same
"compatible" string can be used wathever the management interface
used. The driver must be able to access the underlying bus without
any help from the compatible string (like for TPM2 TIS devices).

So, rename udevice_id tab to ksz_ids since it's not specific to i2c
bus.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
2708c81672 net: ksz9477: add KSZ9896 switch support
Add support for the KSZ9896 6-port Gigabit Ethernet Switch to the
ksz9477 driver.

The KSZ9896 is similar to KSZ9897 but has only one configurable
MII/RMII/RGMII/GMII cpu port.

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
5b87af441f net: ksz9477: remove dev_set_parent_priv() call
The ksz9477 is currently the only driver using dev_set_parent_priv()
outside of the driver model. Also, there was no explanation in the
commit adding ksz9477 driver and why dev_set_parent_priv() is
required.

Actually there is a typo in ksz_mdio_probe() while retrieving
the parent (switch@0) private data:

-	priv->ksz = dev_get_parent_priv(dev->parent);
+	priv->ksz = dev_get_priv(dev->parent);

Printing the address of struct ksz_dsa_priv *priv allows
to notice the slight difference:

ksz_i2c_probe: ksz_dsa_priv *priv 0xfdf45768 // address of the saved priv
ksz_mdio_bind: ksz_dsa_priv *priv 0xfdf45798 // address returned by dev_get_parent_priv(dev->parent)
ksz_mdio_bind: ksz_dsa_priv *priv 0xfdf45768 // address returned by dev_get_priv(dev->parent)

The ksz_mdio driver get the wrong data and without
dev_set_parent_priv() the mdio driver fail to access the underlying
bus.

While it doesn't cause any issue with I2C bus, it override the
per-child data used by the SPI bus (struct spi_slave) and prevent
further bus access (even with sspi command).

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Romain Naour
6df5c5aee3 net: ksz9477: move struct ksz_dsa_priv *priv declaration
struct ksz_dsa_priv *priv should be declared before dev_dbg()

Signed-off-by: Romain Naour <romain.naour@smile.fr>
2024-10-27 10:19:44 -06:00
Frank Sae
95adf607d3 net: phy: motorcomm: Add driver for Motorcomm YT8821 2.5G ethernet phy
Add a driver for the motorcomm YT8821 2.5G ethernet phy which works in
2500base-x mode.

Verify the driver on BPI-R3(with MediaTek MT7986(Filogic 830) SoC) evb.

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
2024-10-27 10:19:02 -06:00
Frank Sae
a1211a5f6b net: phy: motorcomm: Optimize phy speed mask to be compatible to YT8821
YT8531 as Gigabit transceiver uses bit15:14(bit9 reserved default 0) as phy
speed mask, YT8821 as 2.5 Gigabit transceiver uses bit9 bit15:14 as phy
speed mask.

Be compatible to YT8821, reform phy speed mask and phy speed macro.

Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
2024-10-27 10:19:02 -06:00
Hanyuan Zhao
ba30f462a2 net: dc2114x: remove the pass all multicast flag in operation mode settings
Remove the OMR_PM flag and choose 16 perfect filtering mode since in
modern networks there're plenty of multicasts and set ORM_PM flag will
increase the dc2114x's workload and ask the U-Boot to handle packets
not related to itself. And most of the time, U-Boot does not need this
feature.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
c303f4a0dd net: dc2114x: allow users to decide how to tx packets according to IP core
Some IP cores of dc2114x or its variants do not comply so well with
the behaviors described by the official document. Originally this
driver uses only one tx descriptor and organizes it as a ring buffer,
which would lead to a problem that one packet would be sent twice.
This commit adds support to prevent this bug if you are using IP
cores with this issue, by using multiple tx descriptors and
organizing them as a real well-defined ring buffer.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
5fa3e10cec net: dc2114x: allow users to decide whether to detect the tx No Carrier errors
Some IP cores of dc2114x or its variants do not comply so well with
the behaviors described by the official document. A packet could be
sent successfully but reported with No Carrier error. Latest drivers
of this IP core have not detect this error anymore.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
8c18c53164 net: dc2114x: remove unused lines and change the var and print types
This commit fixes a problem that even though the network card does not report
any issues in transmitting a setup frame, the driver prints the error status
every time. Let's set it for debug use.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
23edc8f6a6 net: dc2114x: add support for CPUs that have cache between the memory and the card
This commit adds support for the MIPS and LoongArch CPUs, which would use cache
after they jump into U-Boot. This commit requests the CPU to return the
addresses in uncached windows and flushes the cache in need, to make sure the
memory between the CPU and the network card is in consistency.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
26d88de9e5 net: dc2114x: set the card number to start at zero
Otherwise the number might get kind of weird.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
a35aa5a0c1 net: dc2114x: get mac address from environment
Let this old driver work like the other newer network card drivers, loading the
MAC address from environment, which could be more flexible to set.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Hanyuan Zhao
76146b90e7 net: dc2114x: add support for platforms that don't have pci controllers
There're a few ethernet IP cores which have the same functions with dc2114x,
and can be connected to CPU by AXI or other buses. This commit adds support
for the platforms that do not have PCI controllers, using MMIO to communicate
with the dc2114x IP core.

Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
2024-10-27 10:15:29 -06:00
Tom Rini
8963d433eb Merge tag 'u-boot-rockchip-20241026' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/22993

- New boards:
        rk3566: Hardkernel ODROID-M1S
        rk3588s: Hardkernel ODROID-M2
        rk3588: NanoPC-T6 LTS
- Migrate to use USB_DWC3_GENERIC for rk3328
- Other board level config and dts update
2024-10-26 08:10:31 -06:00
Jonas Karlman
6e751eed97 adc: rockchip-saradc: Use vdd-microvolts prop as fallback
Change to use vdd-microvolts prop value as voltage reference when the
supply regulator is missing or when DM_REGULATOR=n is used.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:48 +08:00
Jonas Karlman
bcbfd1bb37 adc: Allow use of adc with DM_REGULATOR disabled
When DM_REGULATOR=n is used the device_get_supply_regulator() function
always return -ENOSYS.

Change to treat missing support for regulators as a missing optional
vdd/vss-supply regulator to reduce error messages being logged.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:48 +08:00
Tom Rini
47423b81c2 Merge tag 'u-boot-imx-master-20241025a' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22989

- Remove unneeded USB board code and fix reset on mx6ul_14x14_evk.
- Update fastboot buffer size/address for verdin-imx8m{m|p}.
- Fix imxrt1050-evk boot and convert it to standard boot.
- Fix imx8qxp-mek and imx8qm-mek boot.
- Add support for the i.MX93 9X9 QSB board.
- Make livetree API to work on i.MX.
- Set sane default value for i.MX8M SPL_LOAD_FIT_ADDRESS.
- Deduplicate DH i.MX8MP/i.MX6 DHSOM defconfigs.
- Select default TEXT_BASE for i.MX6/i.MX7.
- Several updates for DH i.MX8MP DRC02.
2024-10-25 18:51:05 -06:00
Jesse Taube
1a8d89b7ab imx: imxrt1050-evk: Fix missing clocks for mmc
Two of the clocks required by the usdhc1 controller are missing from the
clock controller node. A recent change enables all the clocks in the
esdhc node, which fails as they are not defined in the clock controller.

Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API")
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
2024-10-25 20:11:24 -03:00
Tom Rini
3fbc657669 AMD/Xilinx changes for v2025.01-rc1 v2
.mailmap:
 - Switch Padmarao's email to AMD one
 
 zynq_spi:
 - Make update_stripe static
 
 xilinx:
 - Update DT description for EMMCs
 
 zynqmp:
 - Update logic around RPUs and tcm handling
 - Update bootmenu selection for Kria
 - Add description for SC vm-p-b1369
 - Fix comment about file location in zynqmp-p-a2197-00-revA.dts
 
 versal:
 - Fix logic around USB boot
 
 versal2:
 - Disable useless features for Mini configurations
 
 versal-net:
 - Get rid of current-speed DT property from mini configuration
 
 microblaze:
 - Fix scriptaddr location
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZxuweAAKCRDKSWXLKUoM
 IY1iAKCH/GKJHEXFfLvr0OGuO6c1SX9+ZQCfTjRAHrL186X6LUgjOpmtmsrVK1c=
 =4gY0
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Merge tag 'xilinx-for-v2025.01-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.01-rc1 v2

.mailmap:
- Switch Padmarao's email to AMD one

zynq_spi:
- Make update_stripe static

xilinx:
- Update DT description for EMMCs

zynqmp:
- Update logic around RPUs and tcm handling
- Update bootmenu selection for Kria
- Add description for SC vm-p-b1369
- Fix comment about file location in zynqmp-p-a2197-00-revA.dts

versal:
- Fix logic around USB boot

versal2:
- Disable useless features for Mini configurations

versal-net:
- Get rid of current-speed DT property from mini configuration

microblaze:
- Fix scriptaddr location

# -----BEGIN PGP SIGNATURE-----
#
# iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZxuweAAKCRDKSWXLKUoM
# IY1iAKCH/GKJHEXFfLvr0OGuO6c1SX9+ZQCfTjRAHrL186X6LUgjOpmtmsrVK1c=
# =4gY0
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 25 Oct 2024 08:51:36 AM CST
# gpg:                using DSA key 1B3CD4CCBD79989413D1C31ECA4965CB294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>" [full]
# gpg:                 aka "Michal Simek (Xilinx) <michals@xilinx.com>" [full]
# gpg:                 aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>" [full]
# gpg:                 aka "Michal Simek (AMD) <michal.simek@amd.com>" [unknown]
2024-10-25 11:55:23 -06:00
Tom Rini
e8a45b50bb Merge tag 'u-boot-dfu-20241025' of https://source.denx.de/u-boot/custodians/u-boot-dfu
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/22962

Dfu:
- Rely on device tree for spi speed/mode on spi flash

Android Image:
- Fix booting on platforms having > 4GiB of memory
- Decompress boot image to kernel_addr_r when compression is enabled
- Honor CONFIG_SYS_LOAD_ADDR when mkbootimg uses default address

Bcb:
- Rework bcb command to use U_BOOT_LONGHELP
- Move ab_select cmd to bcb cmd
- Implement ab_dump command in bcb
- bcb: Write '_<slot>' instead of '<slot>' to misc partition
2024-10-25 08:35:56 -06:00
Venkatesh Yadav Abbarapu
874ea27392 spi: zynq_qspi: Add missing prototype for update_stripe
Add missing prototype to fix the sparse warning,
warning: no previous prototype for 'update_stripe'
[-Wmissing-prototypes].

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241016044402.18052-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-10-25 16:19:55 +02:00
Lukasz Czechowski
609e71e68e rockchip: px30: clk: add UART0 clock getter/setter
Add dedicated getter and setter for SCLK_UART0_PMU.
This allows the driver to correctly handle UART0 clocks, and thus
it fixes the issues with UART0 not working in case DEBUG_UART is
disabled.
Unlike other Rockchip SoCs, i.e. rk3399, in the PX30 the default
clock source for UART is GPLL, instead of external oscillator.
If the DEBUG_UART is enabled, the clock source is changed in
board_debug_uart_init function to 24Mhz oscillator, which also
matches the fallback value obtained from DT node.
In case the DEBUG_UART is disabled, the UART clock source remains
default, and the DM serial driver wrongly configures the baud rate,
resulting in broken communication.
By implementing the UART clock getter/setter, the serial driver
can probe the actual configuration and corectly configure itself.
The DEBUG_UART settings now should not affect it.

The driver supports GPLL and 24M oscillator. NPLL and USBPHY480M
sources, that are managed by CRU, are not yet handled, as likely
they won't be used in real scenarios.

Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:47:44 +08:00
Tim Harvey
d7f27a4fb3 mmc: fsl_esdhc: Convert to use livetree API for fdt access
Convert to using livetree API functions.

Without this if livetree is enabled (OF_LIVE) the fsl_esdhc_imx
driver will fail to read vendor-specific properties from the dt.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2024-10-25 09:07:43 -03:00
Tim Harvey
ad2aad701a i2c: mxc_i2c: Convert to use livetree API for fdt access
Convert to using livetree API functions.

Without this if livetree is enabled (OF_LIVE) the mxc-i2c
driver will fail to support scl-gpios and sda-gpios for
i2c bus recovery.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-10-25 09:07:39 -03:00
Tim Harvey
d279f5d3a8 imx: power-domain: Convert to use livetree API for fdt access
Convert to using livetree API functions.

Without this if livetree is enabled (OF_LIVE) the imx8m-power-domain
driver will (silently) fail to probe its children leaving you with
no power domain support causing issues with certain devices.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2024-10-25 09:07:35 -03:00
Tim Harvey
59382d2cb9 pinctrl: imx: Convert to use livetree API for fdt access
Convert to using livetree API functions.

Without this if livetree is enabled (OF_LIVE) the imx8mq-pinctrl
driver will (silently) fail to probe causing issues with multiple
devices.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-10-25 09:07:30 -03:00
Peng Fan
b16bd53ffa imx: Support i.MX93 9X9 QSB board
Add i.MX93 9x9 Quick Start Board support.
 - Two ddr scripts included w/o inline ecc feature.
 - SDHC/NETWORK/I2C/UART supported
 - PCA9450 supported, default over drive mode
 - Documentation added.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-25 09:07:16 -03:00
Heinrich Schuchardt
db7e81154e block: make blk_create_device() static
There are no users of the blk_create_device() function outside the uclass.
Let's make it static. This will ensure that new block drivers will use
blk_create_devicef().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-24 11:20:58 -06:00
Heinrich Schuchardt
9c19c13bda rockchip: block: simplify rkmtd driver
By using blk_create_devicef() instead of blk_create_devicef() the driver
can be simplified and brought into line with other block device drivers.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Johan Jonker <jbx6244@gmail.com>
2024-10-24 11:20:45 -06:00
Philip Balister
3cf94b6f41 mcp230xx_gpio.c: Add a missing include file.
* Fixes a warning about implicit declaration of udelay.

Signed-off-by: Philip Balister <philip@balister.org>
2024-10-24 11:19:31 -06:00
Han Xu
a3384940ed mtd: spi-nor: Add mt35xu01gbba octal mode SPI NOR flash
Add SPI NOR flash id for mt35xu01gbba which supports 4 bytes address with
octal mode read.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2024-10-24 18:10:50 +05:30
Dmitry Dunaev
5c73c05f20 mtd: spi-nor-ids: Add Puya Semiconductor chips description
Added support for the Puya Semiconductor chips.

The datasheet can be found here:
https://www.puyasemi.com/h_xilie715.html

Signed-off-by: Dmitry Dunaev <dunaev@tecon.ru>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2024-10-24 18:08:51 +05:30
Neil Armstrong
97c29f868d dfu: sf: rely on DT for spi speed and mode
Align with cmd_sf, and try to rely on DT for spi speed and mode,
and still fallback on spi_flash_probe() if it fails.

With the current scheme, spi_flash_probe() will be called
with CONFIG_SF_DEFAULT_SPEED and CONFIG_SF_DEFAULT_MODE
with are set to 0 by default on DT platforms using DM_SPI_FLASH.

Like cmd_sf, keep the option to specify the speed and mode
from the dfu_alt_mode string, but rely on DT properties
if not specified.

Using CONFIG_SF_DEFAULT_SPEED and CONFIG_SF_DEFAULT_MODE
makes the SPIFC controller on Amlogic Meson G12B & SM1
hardware fail and is unable to recover until a system reboot.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20241001-uboot-topic-dfu-sf-dt-v2-2-67f7acfa3ff5@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-10-24 09:42:00 +02:00
Rasmus Villemoes
ed3410ee60 watchdog: introduce separate SPL symbol for WDT_GPIO
Currently, enabling WDT_GPIO on a board which uses SPL, but does not
have SPL_WDT, SPL_DM_GPIO or SPL_OF_CONTROL enabled, breaks the build.

Make it possible to use the WDT_GPIO driver on such boards by
introducing a separate symbol controlling whether the driver is built
for SPL. Make it default to WDT_GPIO such that boards that already
have it enabled and all the SPL prerequisites satisfied will continue
to have it in SPL.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-10-23 07:02:25 +02:00
Rasmus Villemoes
02e352f0da ddr: altera: include u-boot/schedule.h
These TUs currently rely on getting a declaration of schedule()
through some nested include. Include the proper header directly.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-10-23 06:52:38 +02:00
Rasmus Villemoes
4da44fa646 i2c: rzg2l: include u-boot/schedule.h
This TU currently relies on getting a declaration of schedule()
through some nested include. Include the proper header directly.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-10-23 06:52:38 +02:00
Rasmus Villemoes
9e62892228 led: include cyclic.h in led_sw_blink.c
This makes use of the cyclic API but relies on implicitly getting the
appropriate declarations through some nested include. Include the
cyclic.h header directly.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-10-23 06:52:38 +02:00
Bastien Curutchet
f9318b067f drivers: watchdog: Add DaVinci's watchdog support
Add support for the DaVinci's watchdog timer

Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-10-23 06:52:38 +02:00
Rasmus Villemoes
7f3d53c8bf watchdog: gpio_wdt: add support for stoppable devices
Back when I added this driver in commit 2ac8490412c9, I wrote

    The corresponding linux driver apparently has support for some
    watchdog circuits which can be disabled by tri-stating the gpio, but I
    have never actually encountered such a chip in the wild;

That has changed now; I have a board with just such a watchdog on my
desk currently. Add support for that.

- For a hw_algo="toggle" device, the gpio is requested as output if the
  always-running flag is set, otherwise as input.

- The ->start() method is updated to change the direction to output when
  required (i.e. it is not always-running).

- The ->stop() method is implemented, but of course reports failure if
  always-running.

As I still haven't met any hw_algo="level" devices, I'm not entirely
sure how they fit in, but I'm borrowing logic from the corresponding
linux driver:

- In ->probe(), such devices always request the gpio as GPIOD_IS_OUT.

- In ->stop(), the linux driver has an "eternal ping" comment and sets
  the gpio to (logic) high.

Stefan:
Added necessary changes in test/dm/wdt.c to fix CI build breakage, as
suggested by Rasmus.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
2024-10-23 06:52:38 +02:00
Eva Kurchatova
722073a065 video: simplefb: Fix build warn with CONFIG_FDT_64BIT=n
Fix compile warning with !CONFIG_FDT_64BIT by
casting the variable in the debug print.

Signed-off-by: Eva Kurchatova <lekkit@at.encryp.ch>
Reported-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-10-22 20:56:28 +02:00
Tom Rini
a3709638ec Merge patch series "aspeed: ast2700: Add Caliptra ECDSA driver"
Chia-Wei Wang <chiawei_wang@aspeedtech.com> says:

Aspeed AST2700 SoCs integrates the Caliptra secure IP, where an ECDSA384
signature verification HW interface is exported for SoC crypto needs.

This patch series firstly extends the FIT image signing/verify common
code to support the ECDSA384 algorithm. For better convenience, the
device tree for ECDSA public key storage is also revised by referring
to RSA implementations.

After the FIT common code revision, the driver is implemented for
AST2700 to leverage the Caliptra ECDSA384 signature verification.

These are verified by signed FIT images with the algorithm "sha384,ecdsa384".

Link: https://lore.kernel.org/r/20241014095620.216936-1-chiawei_wang@aspeedtech.com
2024-10-21 17:53:11 -06:00
Chia-Wei Wang
936d4cb6eb drivers/crypto: aspeed: Add Caliptra ECDSA384 support
Aspeed AST27xx SoCs integrate the CPTRA 1.0 secure IP, which export
an ECDSA384_SIGNATURE_VERIFY mailbox command service for SoC to use.

This patch is verified by the FIT signature verification using the
"sha384,ecdsa384" algorithm.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-21 17:52:52 -06:00
Tom Rini
63a3dbb7b9 Merge patch series "Add AVS support for J721S2"
Manorit Chawdhry <m-chawdhry@ti.com> says:

This series adds support for Adaptive voltage scaling on J721S2 device [0].

[0]: https://www.ti.com/lit/pdf/spruj28 (Section 5.2.4.1 AVS Support)

AVS Test for J721S2: https://gist.github.com/manorit2001/b2fd9f6764a863294d4aa0755c83c84f
Boot Test results: https://gist.github.com/manorit2001/d44e035552cb19aadeb0d928d5cb5f26

Link: https://lore.kernel.org/r/20241015-b4-upstream-j721s2-avs-v5-0-5c8087387dc5@ti.com
2024-10-21 17:52:40 -06:00
Manorit Chawdhry
96ef1f227d drivers: misc: k3_avs: Extract MPU clk and dev ID from DT
Different devices have different MPU clk and dev ID. Currently it had
been hardcoded. Move it to DT based extraction.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
2024-10-21 17:52:31 -06:00
Manorit Chawdhry
c530cd4fa1 drivers: misc: k3_avs: Check return code while programming AVS
Check if AVS could not be programmed and print a warning.

Fixes: 9d233b4e3ed6 ("misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0")
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
2024-10-21 17:52:31 -06:00