97290 Commits

Author SHA1 Message Date
Jonas Karlman
d1c38bb4a8 rockchip: rk3588-nanopc-t6: Drop upstream props from u-boot.dtsi
The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes from u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:48 +08:00
Marcin Juszkiewicz
ea42f43c56 arm64: dts: rockchip: add SPI flash on NanoPC-T6
FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
It is populated with 32MB one on LTS version.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: a22a629c63b1addcf2d81eaf30383c1deca5b7a9 ]

(cherry picked from commit 7588da65fdf09c7de9f903780c212a8ae96f2866)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Marcin Juszkiewicz
9a614e1b3d arm64: dts: rockchip: add NanoPC-T6 LTS
In the LTS (2310) version the miniPCIe slot got removed and USB 2.0
setup has changed. There are two external accessible ports and two ports
on the internal header.

There is an on-board USB hub which provides:
- one external connector (bottom one)
- two internal ports on pin header
- one port for m.2 E connector

The top USB 2.0 connector comes directly from the SoC.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-4-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: db1dcbe5f752d423421f77d54d246398b196f670 ]

(cherry picked from commit f4a834fbc8cdb40fddd63d083e8d1c6189ba62dc)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Marcin Juszkiewicz
a823d7fd79 arm64: dts: rockchip: move NanoPC-T6 parts to DTS
MiniPCIe slot is present only in first version of NanoPC-T6 (2301).

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-3-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: aea8d84070fe0846961deb23228d9dd3f8caefb3 ]

(cherry picked from commit 697963b1c22336a44ac2e33536c652aae1671b3d)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Marcin Juszkiewicz
48c0c5b00b arm64: dts: rockchip: prepare NanoPC-T6 for LTS board
FriendlyELEC introduced a second version of NanoPC-T6 SBC.

Create common include file and make NanoPC-T6 use it. Following
patches will add LTS version.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-2-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: d14f3a4f1feabb6bb5935bf3b275a1e6bf2208eb ]

(cherry picked from commit e8b52bdfe5a1444edd1b9bb7cc10b9781d72cc84)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Jonas Karlman
44c923e5a7 rockchip: rk3399-pinephone-pro: Drop upstream props from u-boot.dtsi
The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes in u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Jonas Karlman
1308505974 rockchip: rk3588-rock-5b: Drop upstream props from u-boot.dtsi
The SPI flash node has been added in upstream DT, drop all props beside
bootph-* props from the SPI flash related nodes in u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Alex Shumsky
ed4ae73862 rockchip: board: Increase rng-seed size to make it sufficient for modern Linux
Increase rng-seed size to make Linux happy and initialize rng pool instantly.
Linux 5.19+ requires 32 bytes of entropy to initialize random pool, but u-boot
currently provides only 8 bytes.
Linux 5.18 and probably some versions before it used to require 64 bytes.
Bump min value to 64 bytes to be on a safe side.

Boot with 8 byte rng-seed (Linux 6.11):
    # dmesg | grep crng
    [   12.089286] random: crng init done
Boot with 32 byte rng-seed (Linux 6.11):
    # dmesg | grep crng
    [    0.000000] random: crng init done

Linux source references:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/char/random.c?h=v5.19#n551
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/char/random.c?h=v5.18#n236

Signed-off-by: Alex Shumsky <alexthreed@gmail.com>
Fixes: d2048bafae40 ("rockchip: board: Add board_rng_seed() for all Rockchip devices")
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-26 10:46:47 +08:00
Tom Rini
47423b81c2 Merge tag 'u-boot-imx-master-20241025a' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22989

- Remove unneeded USB board code and fix reset on mx6ul_14x14_evk.
- Update fastboot buffer size/address for verdin-imx8m{m|p}.
- Fix imxrt1050-evk boot and convert it to standard boot.
- Fix imx8qxp-mek and imx8qm-mek boot.
- Add support for the i.MX93 9X9 QSB board.
- Make livetree API to work on i.MX.
- Set sane default value for i.MX8M SPL_LOAD_FIT_ADDRESS.
- Deduplicate DH i.MX8MP/i.MX6 DHSOM defconfigs.
- Select default TEXT_BASE for i.MX6/i.MX7.
- Several updates for DH i.MX8MP DRC02.
2024-10-25 18:51:05 -06:00
Marek Vasut
0ccff7f8dc ARM: imx: soc: Move default TEXT_BASE for i.MX7
Move i.MX7 TEXT_BASE/SPL_TEXT_BASE to Kconfig and common/spl/Kconfig
which is the best practice.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-10-25 20:22:01 -03:00
Marek Vasut
304eb6ceea ARM: imx: soc: Select default TEXT_BASE for i.MX6
Select default U-Boot and SPL text base for the i.MX6 SoC. The U-Boot
and SPL text base is picked as the one used by various i.MX6 boards.
Update all the boards.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-10-25 20:21:15 -03:00
Jesse Taube
4bc57d7f34 ARM: dts: imxrt1170: Fix default cells value warnings
Add #address-cells and #size-cells to the memory node to fix warnings

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2024-10-25 20:13:02 -03:00
Jesse Taube
9e5d462a37 configs: imxrt1050-evk: Enable standard boot
Enable standard boot support and add default environments for the
imxrt1050-evk board.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2024-10-25 20:12:15 -03:00
Jesse Taube
1a8d89b7ab imx: imxrt1050-evk: Fix missing clocks for mmc
Two of the clocks required by the usdhc1 controller are missing from the
clock controller node. A recent change enables all the clocks in the
esdhc node, which fails as they are not defined in the clock controller.

Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API")
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
2024-10-25 20:11:24 -03:00
Jesse Taube
1ecbbdda5f imx: imxrt*: Fix binman breaking boot
The init_r parsing of U-Boot device tree to search the binman
information errors. set CONFIG_BINMAN_FDT to no to fix this.

Fixes: 7079eeb72fc ("imx: imxrt1050-evk: Add support for SPI flash booting
s")
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2024-10-25 20:10:40 -03:00
Marek Vasut
4717f386af arm64: imx: Deduplicate DH i.MX6 DHSOM defconfig
Deduplicate defconfigs for all DH i.MX6 DHSOM by including common
configs/imx_dhsom_defconfig . This does introduce changes to the
board configuration, namely it enables commands used on all DHSOM
devices consistenty, the prompt is changed to u-boot=>, support for
booting non-Linux OS which was likely never used is disabled, GPT
partition table support is enabled, generic MTD support is enabled,
LED support is enabled, DM PHY, PMIC and regulator support is also
enabled, KASLR command is enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-25 20:09:31 -03:00
Marek Vasut
b2a39e4cb8 arm64: imx: Deduplicate DH i.MX8MP DHSOM defconfigs
Deduplicate defconfigs for all DH i.MX8MP DHSOM by factoring out the
common parts into generic _dhsom_defconfig and including those using
the #include <configs/...> preprocessor macro, which is applicable to
defconfigs as well. This enables CMD_EXPORTENV on all iMX8MP DHSOM
systems to be consistent with other DHSOM systems.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-25 20:09:31 -03:00
Marek Vasut
1e99444958 arm64: imx: imx8mp: Disable PCA954x I2C mux on DH i.MX8MP DRC02 and PicoITX
Neither the DRC02 nor PicoITX carrier board contains the PCA954x I2C mux
chip, the chip is only present on PDK3 carrier board. Disable support for
the PCA954x mux chip and I2C mux altogether on both i.MX8MP DHCOM DRC02 and
PicoITX.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-25 20:09:31 -03:00
Marek Vasut
19aa2a73f1 arm64: imx: imx8mp: Disable PCI support on DH i.MX8MP DHCOM SoM on DRC02 board
The DRC02 carrier board does not expose PCIe in any way, disable PCIe support.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-25 20:09:31 -03:00
Marek Vasut
8447ded979 arm64: imx: imx8mp: Enable DM regulator on DH i.MX8MP DHCOM SoM on DRC02 board
Make sure DM regulator support is enabled on this board, just like on all
the other DH i.MX8MP DHCOM SoM based boards.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-25 20:09:31 -03:00
Tom Rini
deafcdc8e0 Merge patch series "Allow showing the memory map"
Simon Glass <sjg@chromium.org> says:

This little series adds a new 'memmap' command, intended to show the
layout of memory within U-Boot and how much memory is available for
loading images.

Link: https://lore.kernel.org/r/20241021081934.289473-1-sjg@chromium.org
2024-10-25 14:22:36 -06:00
Simon Glass
9252b7f867 meminfo: Show the lmb records
Add the lmb records onto the end of the memory map.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-25 14:22:24 -06:00
Simon Glass
1c30f7a844 lmb: Export the lmb data structure
Provide a way to access this data structure so that the meminfo command
can use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-10-25 14:22:24 -06:00
Simon Glass
f18c048e6e cmd: Update the meminfo command to show the memory map
U-Boot has a fairly rigid memory map which is normally not visible
unless debugging is enabled in board_f.c

Update the 'meminfo' command to show it. This command does not cover
arch-specific pieces but gives a good overview of where things are.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-25 14:22:24 -06:00
Simon Glass
8306c3b035 cmd: Move meminfo command into its own file
In preparation for expanding this command, move it into a separate file.
Rename the function to remove the extra underscore. Update the number of
arguments to 1, since 3 is incorrect.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-10-25 14:22:24 -06:00
Simon Glass
48008ec711 bootstage: Allow counting memory without strings
The bootstage array includes pointers to strings but not the strings
themselves. The strings are added when stashing, but including them in
the size calculation gives an inflated view of the amount of space used
by the array.

Update this function so it can return the amount of memory used by the
bootstage structures themselves, without the strings which they point
to.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-25 14:22:24 -06:00
Simon Glass
040ab117c7 global_data: Add some more accessors
Add accessors for bloblist, bootstage, trace and video to avoid needing
more #ifdefs in the C code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-25 14:22:24 -06:00
Simon Glass
41fecdc94e common: Tidy up how malloc() is inited
The call to malloc() is a bit strange. The naming of the arguments
suggests that an address is passed, but in fact it is a pointer, at
least in the board_init_r() function and SPL equivalent.

Update it to work as described. Add a function comment as well.

Note that this does adjustment does not extend into the malloc()
implementation itself, apart from changing mem_malloc_init(), since
there are lots of casts and pointers and integers are used
interchangeably.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-10-25 14:22:24 -06:00
Simon Glass
09f5be613a common: Fix up malloc() comment in reserve_noncached()
The function name has changed, so update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-10-25 14:22:24 -06:00
Tom Rini
3fbc657669 AMD/Xilinx changes for v2025.01-rc1 v2
.mailmap:
 - Switch Padmarao's email to AMD one
 
 zynq_spi:
 - Make update_stripe static
 
 xilinx:
 - Update DT description for EMMCs
 
 zynqmp:
 - Update logic around RPUs and tcm handling
 - Update bootmenu selection for Kria
 - Add description for SC vm-p-b1369
 - Fix comment about file location in zynqmp-p-a2197-00-revA.dts
 
 versal:
 - Fix logic around USB boot
 
 versal2:
 - Disable useless features for Mini configurations
 
 versal-net:
 - Get rid of current-speed DT property from mini configuration
 
 microblaze:
 - Fix scriptaddr location
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZxuweAAKCRDKSWXLKUoM
 IY1iAKCH/GKJHEXFfLvr0OGuO6c1SX9+ZQCfTjRAHrL186X6LUgjOpmtmsrVK1c=
 =4gY0
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Merge tag 'xilinx-for-v2025.01-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.01-rc1 v2

.mailmap:
- Switch Padmarao's email to AMD one

zynq_spi:
- Make update_stripe static

xilinx:
- Update DT description for EMMCs

zynqmp:
- Update logic around RPUs and tcm handling
- Update bootmenu selection for Kria
- Add description for SC vm-p-b1369
- Fix comment about file location in zynqmp-p-a2197-00-revA.dts

versal:
- Fix logic around USB boot

versal2:
- Disable useless features for Mini configurations

versal-net:
- Get rid of current-speed DT property from mini configuration

microblaze:
- Fix scriptaddr location

# -----BEGIN PGP SIGNATURE-----
#
# iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZxuweAAKCRDKSWXLKUoM
# IY1iAKCH/GKJHEXFfLvr0OGuO6c1SX9+ZQCfTjRAHrL186X6LUgjOpmtmsrVK1c=
# =4gY0
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 25 Oct 2024 08:51:36 AM CST
# gpg:                using DSA key 1B3CD4CCBD79989413D1C31ECA4965CB294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>" [full]
# gpg:                 aka "Michal Simek (Xilinx) <michals@xilinx.com>" [full]
# gpg:                 aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>" [full]
# gpg:                 aka "Michal Simek (AMD) <michal.simek@amd.com>" [unknown]
2024-10-25 11:55:23 -06:00
Tom Rini
e8a45b50bb Merge tag 'u-boot-dfu-20241025' of https://source.denx.de/u-boot/custodians/u-boot-dfu
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/22962

Dfu:
- Rely on device tree for spi speed/mode on spi flash

Android Image:
- Fix booting on platforms having > 4GiB of memory
- Decompress boot image to kernel_addr_r when compression is enabled
- Honor CONFIG_SYS_LOAD_ADDR when mkbootimg uses default address

Bcb:
- Rework bcb command to use U_BOOT_LONGHELP
- Move ab_select cmd to bcb cmd
- Implement ab_dump command in bcb
- bcb: Write '_<slot>' instead of '<slot>' to misc partition
2024-10-25 08:35:56 -06:00
Padmarao Begari
b3d9c6c714 .mailmap: update e-mail address for Padmarao Begari
Update e-mail address.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20241023085127.3450680-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-10-25 16:21:00 +02:00
Venkatesh Yadav Abbarapu
874ea27392 spi: zynq_qspi: Add missing prototype for update_stripe
Add missing prototype to fix the sparse warning,
warning: no previous prototype for 'update_stripe'
[-Wmissing-prototypes].

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241016044402.18052-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-10-25 16:19:55 +02:00
Jonas Karlman
352cec9a05 board: rockchip: Add Hardkernel ODROID-M1S
The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.

Features tested on a ODROID-M1S 8GB rev1.0 20230906:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:50:47 +08:00
Jonas Karlman
6a5a1475b1 arm64: dts: rockchip: Add Hardkernel ODROID-M1S
The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.

Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240827211825.1419820-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 10dc64fe0f980c47c7e747885ddf7a8c12780337 ]

(cherry picked from commit f811548e758b52896f725753086c42b49dc42c0d)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:50:47 +08:00
Jonas Karlman
74fec32ff7 arm64: dts: rockchip: Correct vendor prefix for Hardkernel ODROID-M1
The vendor prefix for Hardkernel ODROID-M1 is incorrectly listed as
rockchip. Use the proper hardkernel vendor prefix for this board, while
at it also drop the redundant soc prefix.

Fixes: fd3583267703 ("arm64: dts: rockchip: Add Hardkernel ODROID-M1 board")
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240827211825.1419820-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 735065e774dcfc62e38df01a535862138b6c92ed ]

(cherry picked from commit e7259a2c4a6f2ebdfc96b8bbffc77fe67604b11f)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:50:47 +08:00
Jonas Karlman
c099b246ee rockchip: Migrate to use USB_DWC3_GENERIC on RK3328
After the full convertion of usb gadget interrupt handling to
usb_gadget_generic_ops, it is now possible to use DM_USB_GADGET,
DWC2_OTG and DWC3_GENERIC together without causing a build error.

Change to use USB_DWC3_GENERIC instead of USB_XHCI_DWC3 to complte the
migration initiated in commit 1bc4e8eb1d7f ("rockchip: Migrate to use
DM_USB_GADGET on RK3328"). No functional change is intended.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:49:23 +08:00
Jonas Karlman
bcc7eefa4c board: rockchip: Add Hardkernel ODROID-M2
The Hardkernel ODROID-M2 is a single-board computer based on Rockchip
RK3588S2 SoC. It features e.g. 8/16 GB LPDDR5 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0/Type-C.

Features tested on a ODROID-M2 16GB rev1.0 20240611:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:49:12 +08:00
Jonas Karlman
1d557d28b6 arm64: dts: rockchip: Add Hardkernel ODROID-M2
The Hardkernel ODROID-M2 is a single-board computer based on Rockchip
RK3588S2 SoC. It features e.g. 8/16 GB LPDDR5 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0/Type-C.

Add initial support for eMMC, SD-card, Ethernet, PCIe and USB.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240901112020.3224704-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: ce48b8c976ce439c336def6e06bf8224a8ff9125 ]

(cherry picked from commit 7ba62d8b4cb010c6fcb7077550b46d5f5fb5af6d)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:49:12 +08:00
Daniel Semkowicz
3edf14413d rockchip: rk3399: Weaken dependency on SPL serial
Allow to disable serial console in SPL. Weak dependency is already used
with TPL serial.

Signed-off-by: Daniel Semkowicz <dse@thaumatec.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:48:59 +08:00
Chris Morgan
55f6d05350 board: rockchip: Enable PD_VO before driver access
Enable the PD_VO power domain before driver access on the rk3568 SoC.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:48:41 +08:00
Chris Morgan
9119efab3f board: rockchip: Remove ARM SCMI Support from RGxx3
Remove config options for ARM SCMI. It is not required to boot the
board and when using the most recent mainline A-TF it actually causes
the device to freeze during boot due to missing SCMI support.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:48:41 +08:00
Chris Morgan
3f0c97be87 board: rockchip: Add vdd_cpu reg fixup for RGXX3 Series
Some of the Powkiddy devices switched to using a different vendor for
the vdd_cpu regulator. Unfortunately the device does not have a new
revision to denote this, so users have no way of knowing in advance.

Add code to detect if a device is present at addresses 0x1c or 0x40 on
the i2c0 bus and update the devicetree if needed.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:48:41 +08:00
Chris Morgan
7344fa41a2 board: rockchip: Convert Anbernic RGxx3 to OF_UPSTREAM
Refactor the board detection logic (again) to make it compatible with
the upstream device-trees, and switch to OF_UPSTREAM.

Now the device boots with the device-tree for the 353P, and then
loads the correct device tree (of 10) in the later stages of SPL.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:48:40 +08:00
Lukasz Czechowski
609e71e68e rockchip: px30: clk: add UART0 clock getter/setter
Add dedicated getter and setter for SCLK_UART0_PMU.
This allows the driver to correctly handle UART0 clocks, and thus
it fixes the issues with UART0 not working in case DEBUG_UART is
disabled.
Unlike other Rockchip SoCs, i.e. rk3399, in the PX30 the default
clock source for UART is GPLL, instead of external oscillator.
If the DEBUG_UART is enabled, the clock source is changed in
board_debug_uart_init function to 24Mhz oscillator, which also
matches the fallback value obtained from DT node.
In case the DEBUG_UART is disabled, the UART clock source remains
default, and the DM serial driver wrongly configures the baud rate,
resulting in broken communication.
By implementing the UART clock getter/setter, the serial driver
can probe the actual configuration and corectly configure itself.
The DEBUG_UART settings now should not affect it.

The driver supports GPLL and 24M oscillator. NPLL and USBPHY480M
sources, that are managed by CRU, are not yet handled, as likely
they won't be used in real scenarios.

Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:47:44 +08:00
FUKAUMI Naoki
698e5830aa arm: dts: rockchip: turn LEDs on at boot for Radxa boards
Basically, Radxa's boards are intended to turn LEDs on at U-Boot.
add `default-state = "on"` to u-boot.dtsi.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:46:40 +08:00
FUKAUMI Naoki
77b621f7fd configs: rockchip: enable gpio-leds driver for Radxa boards
Basically, Radxa's boards are intended to turn LEDs on at U-Boot.
enable gpio-leds driver and led command.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:46:40 +08:00
FUKAUMI Naoki
e59a6c5523 arm: dts: rockchip: fix dts for Radxa ROCK 4C+
ROCK Pi 4 series and ROCK 4C+ cannot share .dtsi file because 4C+ is
different board.

add rk3399-rock-pi-4-u-boot.dtsi contents and remove dependency of it.

no functional change is intended.

Fixes: 71a95e2efd30 ("arm: dts: rockchip: add Radxa ROCK 4C+")
Suggested-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-10-25 20:43:29 +08:00
Michal Simek
93590a08e3 amd: Disable LMB, BOOTM, MTD and EFI loader for mini configurations
Mini configurations don't need these features that's why disable them.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6a263cf5f6b7c7f8e0bfc11649887f2760385d0e.1728286203.git.michal.simek@amd.com
2024-10-25 14:10:31 +02:00
Padmarao Begari
dcded57038 arm64: zynqmp: fix tcm initialization for mini u-boot
Fix the issue introduced by commit fed064477c2c
("arm64: zynqmp: Print an error for split to lock mode switch").
The mini u-boot is hanging, because of the tcm is not initialized.
The mini u-boot is using the tcm to reserve the mmu table and
currently it is not initialized, so allowing u-boot to initialize
the tcm.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20241011113435.1966604-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-10-25 14:10:31 +02:00